68 lines
2.6 KiB
ArmAsm
68 lines
2.6 KiB
ArmAsm
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM4
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# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM5
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sdiv w0, w1, w2
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udiv x1, x2, x3
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mul w2, w3, w4
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msub x3, x4, x5, x6
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smull x4, w5, w6
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umulh x5, x6, x7
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# ALL: Iterations: 100
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# ALL-NEXT: Instructions: 600
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# EM3-NEXT: Total Cycles: 3305
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# EM4-NEXT: Total Cycles: 3303
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# EM5-NEXT: Total Cycles: 2603
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# ALL-NEXT: Total uOps: 600
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# ALL: Dispatch Width: 6
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# EM3-NEXT: uOps Per Cycle: 0.18
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# EM3-NEXT: IPC: 0.18
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# EM3-NEXT: Block RThroughput: 33.0
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# EM4-NEXT: uOps Per Cycle: 0.18
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# EM4-NEXT: IPC: 0.18
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# EM4-NEXT: Block RThroughput: 33.0
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# EM5-NEXT: uOps Per Cycle: 0.23
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# EM5-NEXT: IPC: 0.23
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# EM5-NEXT: Block RThroughput: 26.0
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# ALL: Instruction Info:
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# ALL-NEXT: [1]: #uOps
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# ALL-NEXT: [2]: Latency
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# ALL-NEXT: [3]: RThroughput
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# ALL-NEXT: [4]: MayLoad
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# ALL-NEXT: [5]: MayStore
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# ALL-NEXT: [6]: HasSideEffects (U)
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# ALL: [1] [2] [3] [4] [5] [6] Instructions:
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# EM3-NEXT: 1 12 12.00 sdiv w0, w1, w2
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# EM3-NEXT: 1 21 21.00 udiv x1, x2, x3
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# EM3-NEXT: 1 3 0.50 mul w2, w3, w4
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# EM3-NEXT: 1 4 1.00 msub x3, x4, x5, x6
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# EM3-NEXT: 1 3 0.50 smull x4, w5, w6
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# EM3-NEXT: 1 4 1.00 umulh x5, x6, x7
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# EM4-NEXT: 1 12 12.00 sdiv w0, w1, w2
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# EM4-NEXT: 1 21 21.00 udiv x1, x2, x3
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# EM4-NEXT: 1 3 0.50 mul w2, w3, w4
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# EM4-NEXT: 1 4 1.00 msub x3, x4, x5, x6
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# EM4-NEXT: 1 3 0.50 smull x4, w5, w6
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# EM4-NEXT: 1 4 1.00 umulh x5, x6, x7
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# EM5-NEXT: 1 10 10.00 sdiv w0, w1, w2
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# EM5-NEXT: 1 16 16.00 udiv x1, x2, x3
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# EM5-NEXT: 1 2 0.50 mul w2, w3, w4
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# EM5-NEXT: 1 3 1.00 msub x3, x4, x5, x6
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# EM5-NEXT: 1 2 0.50 smull x4, w5, w6
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# EM5-NEXT: 1 3 1.00 umulh x5, x6, x7
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