167 lines
9.7 KiB
LLVM
167 lines
9.7 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -basic-aa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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%struct.Ray.5.11.53.113.119.137.149.185.329.389.416 = type { %struct.Vec.0.6.48.108.114.132.144.180.324.384.414, %struct.Vec.0.6.48.108.114.132.144.180.324.384.414 }
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%struct.Vec.0.6.48.108.114.132.144.180.324.384.414 = type { double, double, double }
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; Function Attrs: ssp uwtable
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define void @main() #0 {
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; CHECK-LABEL: @main(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 undef, label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
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; CHECK: cond.true:
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; CHECK-NEXT: unreachable
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; CHECK: cond.end:
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; CHECK-NEXT: br label [[INVOKE_CONT:%.*]]
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; CHECK: invoke.cont:
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; CHECK-NEXT: br i1 undef, label [[ARRAYCTOR_CONT:%.*]], label [[INVOKE_CONT]]
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; CHECK: arrayctor.cont:
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; CHECK-NEXT: [[AGG_TMP99208_SROA_0_0_IDX:%.*]] = getelementptr inbounds [[STRUCT_RAY_5_11_53_113_119_137_149_185_329_389_416:%.*]], %struct.Ray.5.11.53.113.119.137.149.185.329.389.416* undef, i64 0, i32 0, i32 0
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; CHECK-NEXT: [[AGG_TMP101211_SROA_0_0_IDX:%.*]] = getelementptr inbounds [[STRUCT_RAY_5_11_53_113_119_137_149_185_329_389_416]], %struct.Ray.5.11.53.113.119.137.149.185.329.389.416* undef, i64 0, i32 1, i32 0
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; CHECK-NEXT: br label [[FOR_COND36_PREHEADER:%.*]]
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; CHECK: for.cond36.preheader:
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; CHECK-NEXT: br i1 undef, label [[FOR_BODY42_LR_PH_US:%.*]], label [[_Z5CLAMPD_EXIT_1:%.*]]
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; CHECK: cond.false51.us:
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; CHECK-NEXT: unreachable
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; CHECK: cond.true48.us:
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; CHECK-NEXT: br i1 undef, label [[COND_TRUE63_US:%.*]], label [[COND_FALSE66_US:%.*]]
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; CHECK: cond.false66.us:
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; CHECK-NEXT: [[ADD_I276_US:%.*]] = fadd double 0.000000e+00, undef
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[ADD_I276_US]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double undef, i32 1
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; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x double> [[TMP1]], <double 0.000000e+00, double 0xBFA5CC2D1960285F>
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; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> [[TMP2]], <double 1.400000e+02, double 1.400000e+02>
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; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP3]], <double 5.000000e+01, double 5.200000e+01>
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; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x double> undef, [[TMP2]]
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[AGG_TMP99208_SROA_0_0_IDX]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP4]], <2 x double>* [[TMP6]], align 8
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; CHECK-NEXT: [[TMP7:%.*]] = bitcast double* [[AGG_TMP101211_SROA_0_0_IDX]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP5]], <2 x double>* [[TMP7]], align 8
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; CHECK-NEXT: unreachable
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; CHECK: cond.true63.us:
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; CHECK-NEXT: unreachable
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; CHECK: for.body42.lr.ph.us:
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; CHECK-NEXT: br i1 undef, label [[COND_TRUE48_US:%.*]], label [[COND_FALSE51_US:%.*]]
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; CHECK: _Z5clampd.exit.1:
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; CHECK-NEXT: br label [[FOR_COND36_PREHEADER]]
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;
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entry:
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br i1 undef, label %cond.true, label %cond.end
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cond.true: ; preds = %entry
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unreachable
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cond.end: ; preds = %entry
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br label %invoke.cont
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invoke.cont: ; preds = %invoke.cont, %cond.end
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br i1 undef, label %arrayctor.cont, label %invoke.cont
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arrayctor.cont: ; preds = %invoke.cont
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%agg.tmp99208.sroa.0.0.idx = getelementptr inbounds %struct.Ray.5.11.53.113.119.137.149.185.329.389.416, %struct.Ray.5.11.53.113.119.137.149.185.329.389.416* undef, i64 0, i32 0, i32 0
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%agg.tmp99208.sroa.1.8.idx388 = getelementptr inbounds %struct.Ray.5.11.53.113.119.137.149.185.329.389.416, %struct.Ray.5.11.53.113.119.137.149.185.329.389.416* undef, i64 0, i32 0, i32 1
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%agg.tmp101211.sroa.0.0.idx = getelementptr inbounds %struct.Ray.5.11.53.113.119.137.149.185.329.389.416, %struct.Ray.5.11.53.113.119.137.149.185.329.389.416* undef, i64 0, i32 1, i32 0
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%agg.tmp101211.sroa.1.8.idx390 = getelementptr inbounds %struct.Ray.5.11.53.113.119.137.149.185.329.389.416, %struct.Ray.5.11.53.113.119.137.149.185.329.389.416* undef, i64 0, i32 1, i32 1
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br label %for.cond36.preheader
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for.cond36.preheader: ; preds = %_Z5clampd.exit.1, %arrayctor.cont
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br i1 undef, label %for.body42.lr.ph.us, label %_Z5clampd.exit.1
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cond.false51.us: ; preds = %for.body42.lr.ph.us
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unreachable
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cond.true48.us: ; preds = %for.body42.lr.ph.us
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br i1 undef, label %cond.true63.us, label %cond.false66.us
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cond.false66.us: ; preds = %cond.true48.us
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%add.i276.us = fadd double 0.000000e+00, undef
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%add.i264.us = fadd double %add.i276.us, 0.000000e+00
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%add4.i267.us = fadd double undef, 0xBFA5CC2D1960285F
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%mul.i254.us = fmul double %add.i264.us, 1.400000e+02
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%mul2.i256.us = fmul double %add4.i267.us, 1.400000e+02
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%add.i243.us = fadd double %mul.i254.us, 5.000000e+01
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%add4.i246.us = fadd double %mul2.i256.us, 5.200000e+01
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%mul.i.i.us = fmul double undef, %add.i264.us
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%mul2.i.i.us = fmul double undef, %add4.i267.us
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store double %add.i243.us, double* %agg.tmp99208.sroa.0.0.idx, align 8
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store double %add4.i246.us, double* %agg.tmp99208.sroa.1.8.idx388, align 8
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store double %mul.i.i.us, double* %agg.tmp101211.sroa.0.0.idx, align 8
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store double %mul2.i.i.us, double* %agg.tmp101211.sroa.1.8.idx390, align 8
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unreachable
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cond.true63.us: ; preds = %cond.true48.us
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unreachable
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for.body42.lr.ph.us: ; preds = %for.cond36.preheader
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br i1 undef, label %cond.true48.us, label %cond.false51.us
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_Z5clampd.exit.1: ; preds = %for.cond36.preheader
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br label %for.cond36.preheader
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}
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%struct.Ray.5.11.53.95.137.191.197.203.239.257.263.269.275.281.287.293.383.437.443.455.461.599.601 = type { %struct.Vec.0.6.48.90.132.186.192.198.234.252.258.264.270.276.282.288.378.432.438.450.456.594.600, %struct.Vec.0.6.48.90.132.186.192.198.234.252.258.264.270.276.282.288.378.432.438.450.456.594.600 }
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%struct.Vec.0.6.48.90.132.186.192.198.234.252.258.264.270.276.282.288.378.432.438.450.456.594.600 = type { double, double, double }
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define void @_Z8radianceRK3RayiPt() #0 {
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; CHECK-LABEL: @_Z8radianceRK3RayiPt(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 undef, label [[IF_THEN78:%.*]], label [[IF_THEN38:%.*]]
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; CHECK: if.then38:
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> <double undef, double poison>, double undef, i32 1
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; CHECK-NEXT: [[TMP1:%.*]] = fmul <2 x double> undef, [[TMP0]]
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; CHECK-NEXT: [[TMP2:%.*]] = fsub <2 x double> undef, [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> undef, [[TMP2]]
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; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> undef, [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = fadd <2 x double> undef, [[TMP4]]
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; CHECK-NEXT: [[TMP6:%.*]] = fadd <2 x double> undef, [[TMP5]]
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; CHECK-NEXT: [[TMP7:%.*]] = fmul <2 x double> undef, [[TMP6]]
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; CHECK-NEXT: [[AGG_TMP74663_SROA_0_0_IDX:%.*]] = getelementptr inbounds [[STRUCT_RAY_5_11_53_95_137_191_197_203_239_257_263_269_275_281_287_293_383_437_443_455_461_599_601:%.*]], %struct.Ray.5.11.53.95.137.191.197.203.239.257.263.269.275.281.287.293.383.437.443.455.461.599.601* undef, i64 0, i32 1, i32 0
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; CHECK-NEXT: [[TMP8:%.*]] = bitcast double* [[AGG_TMP74663_SROA_0_0_IDX]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP7]], <2 x double>* [[TMP8]], align 8
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; CHECK-NEXT: br label [[RETURN:%.*]]
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; CHECK: if.then78:
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; CHECK-NEXT: br label [[RETURN]]
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; CHECK: return:
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; CHECK-NEXT: ret void
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;
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entry:
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br i1 undef, label %if.then78, label %if.then38
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if.then38: ; preds = %entry
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%mul.i.i790 = fmul double undef, undef
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%mul3.i.i792 = fmul double undef, undef
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%mul.i764 = fmul double undef, %mul3.i.i792
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%mul4.i767 = fmul double undef, undef
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%sub.i768 = fsub double %mul.i764, %mul4.i767
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%mul6.i770 = fmul double undef, %mul.i.i790
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%mul9.i772 = fmul double undef, %mul3.i.i792
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%sub10.i773 = fsub double %mul6.i770, %mul9.i772
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%mul.i736 = fmul double undef, %sub.i768
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%mul2.i738 = fmul double undef, %sub10.i773
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%mul.i727 = fmul double undef, %mul.i736
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%mul2.i729 = fmul double undef, %mul2.i738
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%add.i716 = fadd double undef, %mul.i727
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%add4.i719 = fadd double undef, %mul2.i729
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%add.i695 = fadd double undef, %add.i716
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%add4.i698 = fadd double undef, %add4.i719
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%mul.i.i679 = fmul double undef, %add.i695
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%mul2.i.i680 = fmul double undef, %add4.i698
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%agg.tmp74663.sroa.0.0.idx = getelementptr inbounds %struct.Ray.5.11.53.95.137.191.197.203.239.257.263.269.275.281.287.293.383.437.443.455.461.599.601, %struct.Ray.5.11.53.95.137.191.197.203.239.257.263.269.275.281.287.293.383.437.443.455.461.599.601* undef, i64 0, i32 1, i32 0
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store double %mul.i.i679, double* %agg.tmp74663.sroa.0.0.idx, align 8
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%agg.tmp74663.sroa.1.8.idx943 = getelementptr inbounds %struct.Ray.5.11.53.95.137.191.197.203.239.257.263.269.275.281.287.293.383.437.443.455.461.599.601, %struct.Ray.5.11.53.95.137.191.197.203.239.257.263.269.275.281.287.293.383.437.443.455.461.599.601* undef, i64 0, i32 1, i32 1
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store double %mul2.i.i680, double* %agg.tmp74663.sroa.1.8.idx943, align 8
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br label %return
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if.then78: ; preds = %entry
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br label %return
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return: ; preds = %if.then78, %if.then38
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ret void
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}
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attributes #0 = { ssp uwtable "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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