85 lines
4.1 KiB
LLVM
85 lines
4.1 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -loop-vectorize -S -mtriple=aarch64-unknown-linux-gnu -force-vector-interleave=1 -force-vector-width=4 < %s | FileCheck %s
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; The test checks that there is no assert caused by issue described in PR36032
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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%struct.anon = type { i8 }
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@c = local_unnamed_addr global [6 x i8] zeroinitializer, align 1
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@b = internal global %struct.anon zeroinitializer, align 1
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; Function Attrs: noreturn nounwind
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define void @_Z1dv() local_unnamed_addr #0 {
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; CHECK-LABEL: @_Z1dv(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @"_ZN3$_01aEv"(%struct.anon* nonnull @b)
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[F_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD5:%.*]], [[FOR_COND_CLEANUP:%.*]] ]
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; CHECK-NEXT: [[G_0:%.*]] = phi i32 [ undef, [[ENTRY]] ], [ [[G_1_LCSSA:%.*]], [[FOR_COND_CLEANUP]] ]
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; CHECK-NEXT: [[CMP12:%.*]] = icmp ult i32 [[G_0]], 4
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; CHECK-NEXT: [[CONV:%.*]] = and i32 [[F_0]], 65535
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; CHECK-NEXT: br i1 [[CMP12]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP]]
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; CHECK: for.body.lr.ph:
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; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[G_0]] to i64
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.cond.cleanup.loopexit:
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; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]
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; CHECK: for.cond.cleanup:
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; CHECK-NEXT: [[G_1_LCSSA]] = phi i32 [ [[G_0]], [[FOR_COND]] ], [ 4, [[FOR_COND_CLEANUP_LOOPEXIT:%.*]] ]
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; CHECK-NEXT: [[ADD5]] = add nuw nsw i32 [[CONV]], 4
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; CHECK-NEXT: br label [[FOR_COND]]
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; CHECK: for.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[TMP0]], [[FOR_BODY_LR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[CONV]], [[TMP1]]
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; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[ADD]] to i64
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [6 x i8], [6 x i8]* @c, i64 0, i64 [[IDXPROM]]
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; CHECK-NEXT: [[TMP2:%.*]] = load i8, i8* [[ARRAYIDX]], align 1
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; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: store i8 [[TMP2]], i8* [[ARRAYIDX3]], align 1
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 4
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT]], label [[FOR_BODY]]
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;
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entry:
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%call = tail call i8* @"_ZN3$_01aEv"(%struct.anon* nonnull @b) #2
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br label %for.cond
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for.cond: ; preds = %for.cond.cleanup, %entry
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%f.0 = phi i32 [ 0, %entry ], [ %add5, %for.cond.cleanup ]
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%g.0 = phi i32 [ undef, %entry ], [ %g.1.lcssa, %for.cond.cleanup ]
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%cmp12 = icmp ult i32 %g.0, 4
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%conv = and i32 %f.0, 65535
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br i1 %cmp12, label %for.body.lr.ph, label %for.cond.cleanup
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for.body.lr.ph: ; preds = %for.cond
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%0 = zext i32 %g.0 to i64
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br label %for.body
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for.cond.cleanup.loopexit: ; preds = %for.body
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br label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %for.cond
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%g.1.lcssa = phi i32 [ %g.0, %for.cond ], [ 4, %for.cond.cleanup.loopexit ]
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%add5 = add nuw nsw i32 %conv, 4
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br label %for.cond
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for.body: ; preds = %for.body, %for.body.lr.ph
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%indvars.iv = phi i64 [ %0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
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%1 = trunc i64 %indvars.iv to i32
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%add = add i32 %conv, %1
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%idxprom = zext i32 %add to i64
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%arrayidx = getelementptr inbounds [6 x i8], [6 x i8]* @c, i64 0, i64 %idxprom
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%2 = load i8, i8* %arrayidx, align 1
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%arrayidx3 = getelementptr inbounds i8, i8* %call, i64 %indvars.iv
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store i8 %2, i8* %arrayidx3, align 1
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 4
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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declare i8* @"_ZN3$_01aEv"(%struct.anon*) local_unnamed_addr #1
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