231 lines
12 KiB
LLVM
231 lines
12 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -basic-aa -loop-distribute -enable-loop-distribute -S -enable-mem-access-versioning=0 < %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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; PredicatedScalarEvolution decides it needs to insert a bounds check
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; not based on memory access.
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define void @f(i32* noalias %a, i32* noalias %b, i32* noalias %c, i32* noalias %d, i32* noalias %e, i64 %N) {
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; CHECK-LABEL: @f(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A2:%.*]] = ptrtoint i32* [[A:%.*]] to i64
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; CHECK-NEXT: br label [[FOR_BODY_LVER_CHECK:%.*]]
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; CHECK: for.body.lver.check:
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; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
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; CHECK-NEXT: [[MUL1:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 2, i32 [[TMP1]])
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; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i32, i1 } [[MUL1]], 0
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; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i32, i1 } [[MUL1]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = add i32 0, [[MUL_RESULT]]
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; CHECK-NEXT: [[TMP3:%.*]] = sub i32 0, [[MUL_RESULT]]
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; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i32 [[TMP3]], 0
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; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i32 [[TMP2]], 0
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; CHECK-NEXT: [[TMP6:%.*]] = select i1 false, i1 [[TMP4]], i1 [[TMP5]]
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; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP0]], 4294967295
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; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
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; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[MUL_OVERFLOW]]
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; CHECK-NEXT: [[TMP10:%.*]] = or i1 false, [[TMP9]]
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; CHECK-NEXT: [[MUL3:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 8, i64 [[TMP0]])
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; CHECK-NEXT: [[MUL_RESULT4:%.*]] = extractvalue { i64, i1 } [[MUL3]], 0
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; CHECK-NEXT: [[MUL_OVERFLOW5:%.*]] = extractvalue { i64, i1 } [[MUL3]], 1
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; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[A2]], [[MUL_RESULT4]]
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; CHECK-NEXT: [[TMP12:%.*]] = sub i64 [[A2]], [[MUL_RESULT4]]
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; CHECK-NEXT: [[TMP13:%.*]] = icmp ugt i64 [[TMP12]], [[A2]]
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; CHECK-NEXT: [[TMP14:%.*]] = icmp ult i64 [[TMP11]], [[A2]]
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; CHECK-NEXT: [[TMP15:%.*]] = select i1 false, i1 [[TMP13]], i1 [[TMP14]]
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; CHECK-NEXT: [[TMP16:%.*]] = or i1 [[TMP15]], [[MUL_OVERFLOW5]]
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; CHECK-NEXT: [[TMP17:%.*]] = or i1 [[TMP10]], [[TMP16]]
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; CHECK-NEXT: br i1 [[TMP17]], label [[FOR_BODY_PH_LVER_ORIG:%.*]], label [[FOR_BODY_PH_LDIST1:%.*]]
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; CHECK: for.body.ph.lver.orig:
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; CHECK-NEXT: br label [[FOR_BODY_LVER_ORIG:%.*]]
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; CHECK: for.body.lver.orig:
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; CHECK-NEXT: [[IND_LVER_ORIG:%.*]] = phi i64 [ 0, [[FOR_BODY_PH_LVER_ORIG]] ], [ [[ADD_LVER_ORIG:%.*]], [[FOR_BODY_LVER_ORIG]] ]
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; CHECK-NEXT: [[IND1_LVER_ORIG:%.*]] = phi i32 [ 0, [[FOR_BODY_PH_LVER_ORIG]] ], [ [[INC1_LVER_ORIG:%.*]], [[FOR_BODY_LVER_ORIG]] ]
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; CHECK-NEXT: [[MUL_LVER_ORIG:%.*]] = mul i32 [[IND1_LVER_ORIG]], 2
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; CHECK-NEXT: [[MUL_EXT_LVER_ORIG:%.*]] = zext i32 [[MUL_LVER_ORIG]] to i64
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; CHECK-NEXT: [[ARRAYIDXA_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[MUL_EXT_LVER_ORIG]]
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; CHECK-NEXT: [[LOADA_LVER_ORIG:%.*]] = load i32, i32* [[ARRAYIDXA_LVER_ORIG]], align 4
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; CHECK-NEXT: [[ARRAYIDXB_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[MUL_EXT_LVER_ORIG]]
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; CHECK-NEXT: [[LOADB_LVER_ORIG:%.*]] = load i32, i32* [[ARRAYIDXB_LVER_ORIG]], align 4
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; CHECK-NEXT: [[MULA_LVER_ORIG:%.*]] = mul i32 [[LOADB_LVER_ORIG]], [[LOADA_LVER_ORIG]]
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; CHECK-NEXT: [[ADD_LVER_ORIG]] = add nuw nsw i64 [[IND_LVER_ORIG]], 1
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; CHECK-NEXT: [[INC1_LVER_ORIG]] = add i32 [[IND1_LVER_ORIG]], 1
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; CHECK-NEXT: [[ARRAYIDXA_PLUS_4_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[ADD_LVER_ORIG]]
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; CHECK-NEXT: store i32 [[MULA_LVER_ORIG]], i32* [[ARRAYIDXA_PLUS_4_LVER_ORIG]], align 4
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; CHECK-NEXT: [[ARRAYIDXD_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[D:%.*]], i64 [[MUL_EXT_LVER_ORIG]]
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; CHECK-NEXT: [[LOADD_LVER_ORIG:%.*]] = load i32, i32* [[ARRAYIDXD_LVER_ORIG]], align 4
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; CHECK-NEXT: [[ARRAYIDXE_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[E:%.*]], i64 [[MUL_EXT_LVER_ORIG]]
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; CHECK-NEXT: [[LOADE_LVER_ORIG:%.*]] = load i32, i32* [[ARRAYIDXE_LVER_ORIG]], align 4
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; CHECK-NEXT: [[MULC_LVER_ORIG:%.*]] = mul i32 [[LOADD_LVER_ORIG]], [[LOADE_LVER_ORIG]]
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; CHECK-NEXT: [[ARRAYIDXC_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 [[MUL_EXT_LVER_ORIG]]
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; CHECK-NEXT: store i32 [[MULC_LVER_ORIG]], i32* [[ARRAYIDXC_LVER_ORIG]], align 4
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; CHECK-NEXT: [[EXITCOND_LVER_ORIG:%.*]] = icmp eq i64 [[ADD_LVER_ORIG]], [[N]]
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; CHECK-NEXT: br i1 [[EXITCOND_LVER_ORIG]], label %[[FOR_END1:.*]], label [[FOR_BODY_LVER_ORIG]]
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; CHECK: for.body.ph.ldist1:
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; CHECK-NEXT: br label [[FOR_BODY_LDIST1:%.*]]
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; CHECK: for.body.ldist1:
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; CHECK-NEXT: [[IND_LDIST1:%.*]] = phi i64 [ 0, [[FOR_BODY_PH_LDIST1]] ], [ [[ADD_LDIST1:%.*]], [[FOR_BODY_LDIST1]] ]
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; CHECK-NEXT: [[IND1_LDIST1:%.*]] = phi i32 [ 0, [[FOR_BODY_PH_LDIST1]] ], [ [[INC1_LDIST1:%.*]], [[FOR_BODY_LDIST1]] ]
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; CHECK-NEXT: [[MUL_LDIST1:%.*]] = mul i32 [[IND1_LDIST1]], 2
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; CHECK-NEXT: [[MUL_EXT_LDIST1:%.*]] = zext i32 [[MUL_LDIST1]] to i64
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; CHECK-NEXT: [[ARRAYIDXA_LDIST1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[MUL_EXT_LDIST1]]
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; CHECK-NEXT: [[LOADA_LDIST1:%.*]] = load i32, i32* [[ARRAYIDXA_LDIST1]], align 4
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; CHECK-NEXT: [[ARRAYIDXB_LDIST1:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[MUL_EXT_LDIST1]]
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; CHECK-NEXT: [[LOADB_LDIST1:%.*]] = load i32, i32* [[ARRAYIDXB_LDIST1]], align 4
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; CHECK-NEXT: [[MULA_LDIST1:%.*]] = mul i32 [[LOADB_LDIST1]], [[LOADA_LDIST1]]
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; CHECK-NEXT: [[ADD_LDIST1]] = add nuw nsw i64 [[IND_LDIST1]], 1
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; CHECK-NEXT: [[INC1_LDIST1]] = add i32 [[IND1_LDIST1]], 1
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; CHECK-NEXT: [[ARRAYIDXA_PLUS_4_LDIST1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[ADD_LDIST1]]
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; CHECK-NEXT: store i32 [[MULA_LDIST1]], i32* [[ARRAYIDXA_PLUS_4_LDIST1]], align 4
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; CHECK-NEXT: [[EXITCOND_LDIST1:%.*]] = icmp eq i64 [[ADD_LDIST1]], [[N]]
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; CHECK-NEXT: br i1 [[EXITCOND_LDIST1]], label [[FOR_BODY_PH:%.*]], label [[FOR_BODY_LDIST1]]
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; CHECK: for.body.ph:
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[IND:%.*]] = phi i64 [ 0, [[FOR_BODY_PH]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[IND1:%.*]] = phi i32 [ 0, [[FOR_BODY_PH]] ], [ [[INC1:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[IND1]], 2
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; CHECK-NEXT: [[MUL_EXT:%.*]] = zext i32 [[MUL]] to i64
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; CHECK-NEXT: [[ADD]] = add nuw nsw i64 [[IND]], 1
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; CHECK-NEXT: [[INC1]] = add i32 [[IND1]], 1
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; CHECK-NEXT: [[ARRAYIDXD:%.*]] = getelementptr inbounds i32, i32* [[D]], i64 [[MUL_EXT]]
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; CHECK-NEXT: [[LOADD:%.*]] = load i32, i32* [[ARRAYIDXD]], align 4
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; CHECK-NEXT: [[ARRAYIDXE:%.*]] = getelementptr inbounds i32, i32* [[E]], i64 [[MUL_EXT]]
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; CHECK-NEXT: [[LOADE:%.*]] = load i32, i32* [[ARRAYIDXE]], align 4
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; CHECK-NEXT: [[MULC:%.*]] = mul i32 [[LOADD]], [[LOADE]]
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; CHECK-NEXT: [[ARRAYIDXC:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 [[MUL_EXT]]
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; CHECK-NEXT: store i32 [[MULC]], i32* [[ARRAYIDXC]], align 4
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[ADD]], [[N]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_END2:.*]], label [[FOR_BODY]]
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; CHECK: [[FOR_END1]]:
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; CHECK: br label %for.end
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; CHECK: [[FOR_END2]]:
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; CHECK: br label %for.end
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%ind = phi i64 [ 0, %entry ], [ %add, %for.body ]
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%ind1 = phi i32 [ 0, %entry ], [ %inc1, %for.body ]
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%mul = mul i32 %ind1, 2
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%mul_ext = zext i32 %mul to i64
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%arrayidxA = getelementptr inbounds i32, i32* %a, i64 %mul_ext
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%loadA = load i32, i32* %arrayidxA, align 4
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%arrayidxB = getelementptr inbounds i32, i32* %b, i64 %mul_ext
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%loadB = load i32, i32* %arrayidxB, align 4
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%mulA = mul i32 %loadB, %loadA
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%add = add nuw nsw i64 %ind, 1
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%inc1 = add i32 %ind1, 1
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%arrayidxA_plus_4 = getelementptr inbounds i32, i32* %a, i64 %add
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store i32 %mulA, i32* %arrayidxA_plus_4, align 4
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%arrayidxD = getelementptr inbounds i32, i32* %d, i64 %mul_ext
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%loadD = load i32, i32* %arrayidxD, align 4
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%arrayidxE = getelementptr inbounds i32, i32* %e, i64 %mul_ext
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%loadE = load i32, i32* %arrayidxE, align 4
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%mulC = mul i32 %loadD, %loadE
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%arrayidxC = getelementptr inbounds i32, i32* %c, i64 %mul_ext
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store i32 %mulC, i32* %arrayidxC, align 4
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%exitcond = icmp eq i64 %add, %N
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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}
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; Can't add control dependency with convergent in loop body.
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define void @f_with_convergent(i32* noalias %a, i32* noalias %b, i32* noalias %c, i32* noalias %d, i32* noalias %e, i64 %N) #1 {
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; CHECK-LABEL: @f_with_convergent(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[IND:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[IND1:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC1:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[IND1]], 2
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; CHECK-NEXT: [[MUL_EXT:%.*]] = zext i32 [[MUL]] to i64
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; CHECK-NEXT: [[ARRAYIDXA:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[MUL_EXT]]
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; CHECK-NEXT: [[LOADA:%.*]] = load i32, i32* [[ARRAYIDXA]], align 4
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; CHECK-NEXT: [[ARRAYIDXB:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[MUL_EXT]]
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; CHECK-NEXT: [[LOADB:%.*]] = load i32, i32* [[ARRAYIDXB]], align 4
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; CHECK-NEXT: [[MULA:%.*]] = mul i32 [[LOADB]], [[LOADA]]
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; CHECK-NEXT: [[ADD]] = add nuw nsw i64 [[IND]], 1
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; CHECK-NEXT: [[INC1]] = add i32 [[IND1]], 1
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; CHECK-NEXT: [[ARRAYIDXA_PLUS_4:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[ADD]]
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; CHECK-NEXT: store i32 [[MULA]], i32* [[ARRAYIDXA_PLUS_4]], align 4
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; CHECK-NEXT: [[ARRAYIDXD:%.*]] = getelementptr inbounds i32, i32* [[D:%.*]], i64 [[MUL_EXT]]
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; CHECK-NEXT: [[LOADD:%.*]] = load i32, i32* [[ARRAYIDXD]], align 4
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; CHECK-NEXT: [[ARRAYIDXE:%.*]] = getelementptr inbounds i32, i32* [[E:%.*]], i64 [[MUL_EXT]]
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; CHECK-NEXT: [[LOADE:%.*]] = load i32, i32* [[ARRAYIDXE]], align 4
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; CHECK-NEXT: [[CONVERGENTD:%.*]] = call i32 @llvm.convergent(i32 [[LOADD]])
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; CHECK-NEXT: [[MULC:%.*]] = mul i32 [[CONVERGENTD]], [[LOADE]]
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; CHECK-NEXT: [[ARRAYIDXC:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 [[MUL_EXT]]
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; CHECK-NEXT: store i32 [[MULC]], i32* [[ARRAYIDXC]], align 4
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[ADD]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%ind = phi i64 [ 0, %entry ], [ %add, %for.body ]
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%ind1 = phi i32 [ 0, %entry ], [ %inc1, %for.body ]
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%mul = mul i32 %ind1, 2
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%mul_ext = zext i32 %mul to i64
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%arrayidxA = getelementptr inbounds i32, i32* %a, i64 %mul_ext
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%loadA = load i32, i32* %arrayidxA, align 4
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%arrayidxB = getelementptr inbounds i32, i32* %b, i64 %mul_ext
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%loadB = load i32, i32* %arrayidxB, align 4
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%mulA = mul i32 %loadB, %loadA
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%add = add nuw nsw i64 %ind, 1
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%inc1 = add i32 %ind1, 1
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%arrayidxA_plus_4 = getelementptr inbounds i32, i32* %a, i64 %add
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store i32 %mulA, i32* %arrayidxA_plus_4, align 4
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%arrayidxD = getelementptr inbounds i32, i32* %d, i64 %mul_ext
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%loadD = load i32, i32* %arrayidxD, align 4
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%arrayidxE = getelementptr inbounds i32, i32* %e, i64 %mul_ext
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%loadE = load i32, i32* %arrayidxE, align 4
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%convergentD = call i32 @llvm.convergent(i32 %loadD)
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%mulC = mul i32 %convergentD, %loadE
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%arrayidxC = getelementptr inbounds i32, i32* %c, i64 %mul_ext
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store i32 %mulC, i32* %arrayidxC, align 4
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%exitcond = icmp eq i64 %add, %N
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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}
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declare i32 @llvm.convergent(i32) #0
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attributes #0 = { nounwind readnone convergent }
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attributes #1 = { nounwind convergent }
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