195 lines
9.9 KiB
LLVM
195 lines
9.9 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -mtriple=x86_64-unknown-unknown -S | FileCheck %s
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declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>)
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declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>)
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declare <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double>, <4 x double>)
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declare <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float>, <8 x float>)
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declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8 immarg) #0
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;
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; Demanded Elts
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;
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define double @elts_addsub_v2f64(<2 x double> %0, <2 x double> %1) {
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; CHECK-LABEL: @elts_addsub_v2f64(
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; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP1:%.*]], <2 x double> poison, <2 x i32> <i32 1, i32 undef>
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; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP0:%.*]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 0
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; CHECK-NEXT: ret double [[TMP5]]
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;
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%3 = shufflevector <2 x double> %0, <2 x double> poison, <2 x i32> <i32 0, i32 0>
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%4 = shufflevector <2 x double> %1, <2 x double> poison, <2 x i32> <i32 1, i32 1>
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%5 = tail call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %3, <2 x double> %4)
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%6 = extractelement <2 x double> %5, i32 0
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ret double %6
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}
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define double @elts_addsub_v2f64_sub(<2 x double> %0, <2 x double> %1) {
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; CHECK-LABEL: @elts_addsub_v2f64_sub(
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; CHECK-NEXT: [[TMP3:%.*]] = fsub <2 x double> [[TMP0:%.*]], [[TMP1:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
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; CHECK-NEXT: ret double [[TMP4]]
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;
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%3 = shufflevector <2 x double> %0, <2 x double> poison, <2 x i32> <i32 0, i32 0>
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%4 = shufflevector <2 x double> %1, <2 x double> poison, <2 x i32> <i32 0, i32 0>
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%5 = tail call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %3, <2 x double> %4)
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%6 = extractelement <2 x double> %5, i32 0
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ret double %6
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}
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define float @elts_addsub_v4f32(<4 x float> %0, <4 x float> %1) {
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; CHECK-LABEL: @elts_addsub_v4f32(
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; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP0:%.*]], <4 x float> [[TMP1:%.*]])
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i32 1
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; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]]
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; CHECK-NEXT: ret float [[TMP6]]
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;
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%3 = shufflevector <4 x float> %0, <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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%4 = shufflevector <4 x float> %1, <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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%5 = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %3, <4 x float> %4)
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%6 = extractelement <4 x float> %5, i32 0
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%7 = extractelement <4 x float> %5, i32 1
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%8 = fadd float %6, %7
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ret float %8
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}
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define float @elts_addsub_v4f32_add(<4 x float> %0, <4 x float> %1) {
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; CHECK-LABEL: @elts_addsub_v4f32_add(
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; CHECK-NEXT: [[TMP3:%.*]] = fadd <4 x float> [[TMP0:%.*]], [[TMP1:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP3]], i32 1
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP3]], i32 1
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; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]]
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; CHECK-NEXT: ret float [[TMP6]]
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;
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%3 = shufflevector <4 x float> %0, <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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%4 = shufflevector <4 x float> %1, <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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%5 = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %3, <4 x float> %4)
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%6 = extractelement <4 x float> %5, i32 1
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%7 = extractelement <4 x float> %5, i32 3
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%8 = fadd float %6, %7
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ret float %8
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}
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define double @elts_addsub_v4f64(<4 x double> %0, <4 x double> %1) {
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; CHECK-LABEL: @elts_addsub_v4f64(
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; CHECK-NEXT: [[TMP3:%.*]] = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> [[TMP0:%.*]], <4 x double> [[TMP1:%.*]])
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i32 1
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; CHECK-NEXT: [[TMP6:%.*]] = fadd double [[TMP4]], [[TMP5]]
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; CHECK-NEXT: ret double [[TMP6]]
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;
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%3 = shufflevector <4 x double> %0, <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 3>
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%4 = shufflevector <4 x double> %1, <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 3>
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%5 = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> %3, <4 x double> %4)
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%6 = extractelement <4 x double> %5, i32 0
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%7 = extractelement <4 x double> %5, i32 1
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%8 = fadd double %6, %7
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ret double %8
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}
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define double @elts_addsub_v4f64_add(<4 x double> %0, <4 x double> %1) {
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; CHECK-LABEL: @elts_addsub_v4f64_add(
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; CHECK-NEXT: [[TMP3:%.*]] = fadd <4 x double> [[TMP0:%.*]], [[TMP1:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP3]], i32 1
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP3]], i32 3
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; CHECK-NEXT: [[TMP6:%.*]] = fadd double [[TMP4]], [[TMP5]]
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; CHECK-NEXT: ret double [[TMP6]]
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;
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%3 = shufflevector <4 x double> %0, <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 3>
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%4 = shufflevector <4 x double> %1, <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 3>
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%5 = tail call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> %3, <4 x double> %4)
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%6 = extractelement <4 x double> %5, i32 1
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%7 = extractelement <4 x double> %5, i32 3
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%8 = fadd double %6, %7
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ret double %8
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}
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define float @elts_addsub_v8f32(<8 x float> %0, <8 x float> %1) {
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; CHECK-LABEL: @elts_addsub_v8f32(
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; CHECK-NEXT: [[TMP3:%.*]] = tail call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> [[TMP0:%.*]], <8 x float> [[TMP1:%.*]])
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i32 1
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; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]]
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; CHECK-NEXT: ret float [[TMP6]]
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;
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%3 = shufflevector <8 x float> %0, <8 x float> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 4, i32 4, i32 4>
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%4 = shufflevector <8 x float> %1, <8 x float> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 4, i32 4, i32 4>
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%5 = tail call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> %3, <8 x float> %4)
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%6 = extractelement <8 x float> %5, i32 0
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%7 = extractelement <8 x float> %5, i32 1
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%8 = fadd float %6, %7
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ret float %8
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}
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define float @elts_addsub_v8f32_sub(<8 x float> %0, <8 x float> %1) {
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; CHECK-LABEL: @elts_addsub_v8f32_sub(
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; CHECK-NEXT: [[TMP3:%.*]] = fsub <8 x float> [[TMP0:%.*]], [[TMP1:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP3]], i32 0
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <8 x float> [[TMP3]], i32 4
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; CHECK-NEXT: [[TMP6:%.*]] = fadd float [[TMP4]], [[TMP5]]
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; CHECK-NEXT: ret float [[TMP6]]
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;
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%3 = shufflevector <8 x float> %0, <8 x float> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 4, i32 4, i32 4>
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%4 = shufflevector <8 x float> %1, <8 x float> poison, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 4, i32 4, i32 4>
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%5 = tail call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> %3, <8 x float> %4)
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%6 = extractelement <8 x float> %5, i32 0
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%7 = extractelement <8 x float> %5, i32 4
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%8 = fadd float %6, %7
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ret float %8
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}
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define void @PR46277(float %0, float %1, float %2, float %3, <4 x float> %4, float* %5) {
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; CHECK-LABEL: @PR46277(
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; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x float> poison, float [[TMP0:%.*]], i32 0
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; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x float> [[TMP7]], float [[TMP1:%.*]], i32 1
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; CHECK-NEXT: [[TMP9:%.*]] = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> [[TMP8]], <4 x float> [[TMP4:%.*]])
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; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x float> [[TMP9]], i32 0
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; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds float, float* [[TMP5:%.*]], i64 1
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; CHECK-NEXT: store float [[TMP10]], float* [[TMP5]], align 4
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; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x float> [[TMP9]], i32 1
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; CHECK-NEXT: store float [[TMP12]], float* [[TMP11]], align 4
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; CHECK-NEXT: ret void
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;
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%7 = insertelement <4 x float> poison, float %0, i32 0
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%8 = insertelement <4 x float> %7, float %1, i32 1
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%9 = insertelement <4 x float> %8, float %2, i32 2
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%10 = insertelement <4 x float> %9, float %3, i32 3
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%11 = tail call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %10, <4 x float> %4)
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%12 = extractelement <4 x float> %11, i32 0
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%13 = getelementptr inbounds float, float* %5, i64 1
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store float %12, float* %5, align 4
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%14 = extractelement <4 x float> %11, i32 1
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store float %14, float* %13, align 4
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ret void
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}
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define double @PR48476_fsub(<2 x double> %x) {
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; CHECK-LABEL: @PR48476_fsub(
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; CHECK-NEXT: [[TMP1:%.*]] = fsub <2 x double> <double 0.000000e+00, double poison>, [[X:%.*]]
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; CHECK-NEXT: [[T2:%.*]] = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> [[TMP1]], <2 x double> [[X]], i8 6)
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; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[T2]], i32 0
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; CHECK-NEXT: ret double [[VECEXT]]
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;
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%t1 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> zeroinitializer, <2 x double> %x)
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%t2 = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %t1, <2 x double> %x, i8 6)
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%vecext = extractelement <2 x double> %t2, i32 0
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ret double %vecext
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}
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define double @PR48476_fadd_fsub(<2 x double> %x) {
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; CHECK-LABEL: @PR48476_fadd_fsub(
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; CHECK-NEXT: [[TMP1:%.*]] = fadd <2 x double> [[X:%.*]], <double poison, double 0.000000e+00>
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; CHECK-NEXT: [[S:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> poison, <2 x i32> <i32 1, i32 undef>
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; CHECK-NEXT: [[TMP2:%.*]] = fsub <2 x double> [[S]], [[X]]
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; CHECK-NEXT: [[VECEXT:%.*]] = extractelement <2 x double> [[TMP2]], i32 0
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; CHECK-NEXT: ret double [[VECEXT]]
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;
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%t1 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> zeroinitializer, <2 x double> %x)
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%s = shufflevector <2 x double> %t1, <2 x double> poison, <2 x i32> <i32 1, i32 0>
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%t2 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %s, <2 x double> %x)
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%vecext = extractelement <2 x double> %t2, i32 0
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ret double %vecext
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}
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