295 lines
12 KiB
LLVM
295 lines
12 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -codegenprepare -S < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare void @use(i32) local_unnamed_addr
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declare void @useptr([2 x i8*]*) local_unnamed_addr
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; CHECK: @simple.targets = constant [2 x i8*] [i8* blockaddress(@simple, %bb0), i8* blockaddress(@simple, %bb1)], align 16
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@simple.targets = constant [2 x i8*] [i8* blockaddress(@simple, %bb0), i8* blockaddress(@simple, %bb1)], align 16
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; CHECK: @multi.targets = constant [2 x i8*] [i8* blockaddress(@multi, %bb0), i8* blockaddress(@multi, %bb1)], align 16
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@multi.targets = constant [2 x i8*] [i8* blockaddress(@multi, %bb0), i8* blockaddress(@multi, %bb1)], align 16
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; CHECK: @loop.targets = constant [2 x i8*] [i8* blockaddress(@loop, %bb0), i8* blockaddress(@loop, %bb1)], align 16
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@loop.targets = constant [2 x i8*] [i8* blockaddress(@loop, %bb0), i8* blockaddress(@loop, %bb1)], align 16
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; CHECK: @nophi.targets = constant [2 x i8*] [i8* blockaddress(@nophi, %bb0), i8* blockaddress(@nophi, %bb1)], align 16
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@nophi.targets = constant [2 x i8*] [i8* blockaddress(@nophi, %bb0), i8* blockaddress(@nophi, %bb1)], align 16
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; CHECK: @noncritical.targets = constant [2 x i8*] [i8* blockaddress(@noncritical, %bb0), i8* blockaddress(@noncritical, %bb1)], align 16
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@noncritical.targets = constant [2 x i8*] [i8* blockaddress(@noncritical, %bb0), i8* blockaddress(@noncritical, %bb1)], align 16
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; Check that we break the critical edge when an jump table has only one use.
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define void @simple(i32* nocapture readonly %p) {
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; CHECK-LABEL: @simple(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1
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; CHECK-NEXT: [[INITVAL:%.*]] = load i32, i32* [[P]], align 4
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; CHECK-NEXT: [[INITOP:%.*]] = load i32, i32* [[INCDEC_PTR]], align 4
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; CHECK-NEXT: switch i32 [[INITOP]], label [[EXIT:%.*]] [
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; CHECK-NEXT: i32 0, label [[BB0_CLONE:%.*]]
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; CHECK-NEXT: i32 1, label [[BB1_CLONE:%.*]]
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; CHECK-NEXT: ]
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; CHECK: bb0:
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; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
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; CHECK: .split:
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; CHECK-NEXT: [[MERGE:%.*]] = phi i32* [ [[PTR:%.*]], [[BB0:%.*]] ], [ [[INCDEC_PTR]], [[BB0_CLONE]] ]
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; CHECK-NEXT: [[MERGE2:%.*]] = phi i32 [ 0, [[BB0]] ], [ [[INITVAL]], [[BB0_CLONE]] ]
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; CHECK-NEXT: tail call void @use(i32 [[MERGE2]])
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; CHECK-NEXT: br label [[INDIRECTGOTO:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: br label [[DOTSPLIT3:%.*]]
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; CHECK: .split3:
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; CHECK-NEXT: [[MERGE5:%.*]] = phi i32* [ [[PTR]], [[BB1:%.*]] ], [ [[INCDEC_PTR]], [[BB1_CLONE]] ]
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; CHECK-NEXT: [[MERGE7:%.*]] = phi i32 [ 1, [[BB1]] ], [ [[INITVAL]], [[BB1_CLONE]] ]
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; CHECK-NEXT: tail call void @use(i32 [[MERGE7]])
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; CHECK-NEXT: br label [[INDIRECTGOTO]]
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; CHECK: indirectgoto:
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; CHECK-NEXT: [[P_ADDR_SINK:%.*]] = phi i32* [ [[MERGE5]], [[DOTSPLIT3]] ], [ [[MERGE]], [[DOTSPLIT]] ]
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; CHECK-NEXT: [[PTR]] = getelementptr inbounds i32, i32* [[P_ADDR_SINK]], i64 1
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; CHECK-NEXT: [[NEWP:%.*]] = load i32, i32* [[P_ADDR_SINK]], align 4
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; CHECK-NEXT: [[IDX:%.*]] = sext i32 [[NEWP]] to i64
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @simple.targets, i64 0, i64 [[IDX]]
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; CHECK-NEXT: [[NEWOP:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8
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; CHECK-NEXT: indirectbr i8* [[NEWOP]], [label [[BB0]], label %bb1]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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; CHECK: bb0.clone:
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; CHECK-NEXT: br label [[DOTSPLIT]]
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; CHECK: bb1.clone:
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; CHECK-NEXT: br label [[DOTSPLIT3]]
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;
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entry:
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%incdec.ptr = getelementptr inbounds i32, i32* %p, i64 1
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%initval = load i32, i32* %p, align 4
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%initop = load i32, i32* %incdec.ptr, align 4
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switch i32 %initop, label %exit [
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i32 0, label %bb0
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i32 1, label %bb1
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]
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bb0:
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%p.addr.0 = phi i32* [ %incdec.ptr, %entry ], [ %ptr, %indirectgoto ]
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%opcode.0 = phi i32 [ %initval, %entry ], [ 0, %indirectgoto ]
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tail call void @use(i32 %opcode.0)
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br label %indirectgoto
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bb1:
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%p.addr.1 = phi i32* [ %incdec.ptr, %entry ], [ %ptr, %indirectgoto ]
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%opcode.1 = phi i32 [ %initval, %entry ], [ 1, %indirectgoto ]
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tail call void @use(i32 %opcode.1)
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br label %indirectgoto
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indirectgoto:
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%p.addr.sink = phi i32* [ %p.addr.1, %bb1 ], [ %p.addr.0, %bb0 ]
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%ptr = getelementptr inbounds i32, i32* %p.addr.sink, i64 1
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%newp = load i32, i32* %p.addr.sink, align 4
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%idx = sext i32 %newp to i64
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%arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @simple.targets, i64 0, i64 %idx
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%newop = load i8*, i8** %arrayidx, align 8
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indirectbr i8* %newop, [label %bb0, label %bb1]
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exit:
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ret void
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}
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; Don't try to break critical edges when several indirectbr point to a single block
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define void @multi(i32* nocapture readonly %p) {
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; CHECK-LABEL: @multi(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1
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; CHECK-NEXT: [[INITVAL:%.*]] = load i32, i32* [[P]], align 4
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; CHECK-NEXT: [[INITOP:%.*]] = load i32, i32* [[INCDEC_PTR]], align 4
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; CHECK-NEXT: switch i32 [[INITOP]], label [[EXIT:%.*]] [
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; CHECK-NEXT: i32 0, label [[BB0:%.*]]
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; CHECK-NEXT: i32 1, label [[BB1:%.*]]
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; CHECK-NEXT: ]
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; CHECK: bb0:
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; CHECK-NEXT: [[P_ADDR_0:%.*]] = phi i32* [ [[INCDEC_PTR]], [[ENTRY:%.*]] ], [ [[NEXT0:%.*]], [[BB0]] ], [ [[NEXT1:%.*]], [[BB1]] ]
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; CHECK-NEXT: [[OPCODE_0:%.*]] = phi i32 [ [[INITVAL]], [[ENTRY]] ], [ 0, [[BB0]] ], [ 1, [[BB1]] ]
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; CHECK-NEXT: tail call void @use(i32 [[OPCODE_0]])
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; CHECK-NEXT: [[NEXT0]] = getelementptr inbounds i32, i32* [[P_ADDR_0]], i64 1
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; CHECK-NEXT: [[NEWP0:%.*]] = load i32, i32* [[P_ADDR_0]], align 4
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; CHECK-NEXT: [[IDX0:%.*]] = sext i32 [[NEWP0]] to i64
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; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @multi.targets, i64 0, i64 [[IDX0]]
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; CHECK-NEXT: [[NEWOP0:%.*]] = load i8*, i8** [[ARRAYIDX0]], align 8
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; CHECK-NEXT: indirectbr i8* [[NEWOP0]], [label [[BB0]], label %bb1]
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; CHECK: bb1:
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; CHECK-NEXT: [[P_ADDR_1:%.*]] = phi i32* [ [[INCDEC_PTR]], [[ENTRY]] ], [ [[NEXT0]], [[BB0]] ], [ [[NEXT1]], [[BB1]] ]
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; CHECK-NEXT: [[OPCODE_1:%.*]] = phi i32 [ [[INITVAL]], [[ENTRY]] ], [ 0, [[BB0]] ], [ 1, [[BB1]] ]
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; CHECK-NEXT: tail call void @use(i32 [[OPCODE_1]])
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; CHECK-NEXT: [[NEXT1]] = getelementptr inbounds i32, i32* [[P_ADDR_1]], i64 1
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; CHECK-NEXT: [[NEWP1:%.*]] = load i32, i32* [[P_ADDR_1]], align 4
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; CHECK-NEXT: [[IDX1:%.*]] = sext i32 [[NEWP1]] to i64
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; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @multi.targets, i64 0, i64 [[IDX1]]
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; CHECK-NEXT: [[NEWOP1:%.*]] = load i8*, i8** [[ARRAYIDX1]], align 8
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; CHECK-NEXT: indirectbr i8* [[NEWOP1]], [label [[BB0]], label %bb1]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%incdec.ptr = getelementptr inbounds i32, i32* %p, i64 1
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%initval = load i32, i32* %p, align 4
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%initop = load i32, i32* %incdec.ptr, align 4
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switch i32 %initop, label %exit [
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i32 0, label %bb0
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i32 1, label %bb1
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]
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bb0:
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%p.addr.0 = phi i32* [ %incdec.ptr, %entry ], [ %next0, %bb0 ], [ %next1, %bb1 ]
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%opcode.0 = phi i32 [ %initval, %entry ], [ 0, %bb0 ], [ 1, %bb1 ]
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tail call void @use(i32 %opcode.0)
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%next0 = getelementptr inbounds i32, i32* %p.addr.0, i64 1
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%newp0 = load i32, i32* %p.addr.0, align 4
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%idx0 = sext i32 %newp0 to i64
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%arrayidx0 = getelementptr inbounds [2 x i8*], [2 x i8*]* @multi.targets, i64 0, i64 %idx0
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%newop0 = load i8*, i8** %arrayidx0, align 8
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indirectbr i8* %newop0, [label %bb0, label %bb1]
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bb1:
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%p.addr.1 = phi i32* [ %incdec.ptr, %entry ], [ %next0, %bb0 ], [ %next1, %bb1 ]
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%opcode.1 = phi i32 [ %initval, %entry ], [ 0, %bb0 ], [ 1, %bb1 ]
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tail call void @use(i32 %opcode.1)
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%next1 = getelementptr inbounds i32, i32* %p.addr.1, i64 1
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%newp1 = load i32, i32* %p.addr.1, align 4
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%idx1 = sext i32 %newp1 to i64
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%arrayidx1 = getelementptr inbounds [2 x i8*], [2 x i8*]* @multi.targets, i64 0, i64 %idx1
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%newop1 = load i8*, i8** %arrayidx1, align 8
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indirectbr i8* %newop1, [label %bb0, label %bb1]
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exit:
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ret void
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}
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; Make sure we do the right thing for cases where the indirectbr branches to
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; the block it terminates.
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define void @loop(i64* nocapture readonly %p) {
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; CHECK-LABEL: @loop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[DOTSPLIT:%.*]]
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; CHECK: bb0:
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; CHECK-NEXT: br label [[DOTSPLIT]]
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; CHECK: .split:
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; CHECK-NEXT: [[MERGE:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[BB0:%.*]] ], [ 0, [[BB0_CLONE:%.*]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i64, i64* [[P:%.*]], i64 [[MERGE]]
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; CHECK-NEXT: store i64 [[MERGE]], i64* [[TMP0]], align 4
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; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[MERGE]], 1
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; CHECK-NEXT: [[IDX:%.*]] = srem i64 [[MERGE]], 2
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @loop.targets, i64 0, i64 [[IDX]]
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; CHECK-NEXT: [[TARGET:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8
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; CHECK-NEXT: indirectbr i8* [[TARGET]], [label [[BB0]], label %bb1]
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; CHECK: bb1:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %bb0
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bb0:
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%i = phi i64 [ %i.next, %bb0 ], [ 0, %entry ]
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%tmp0 = getelementptr inbounds i64, i64* %p, i64 %i
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store i64 %i, i64* %tmp0, align 4
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%i.next = add nuw nsw i64 %i, 1
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%idx = srem i64 %i, 2
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%arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @loop.targets, i64 0, i64 %idx
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%target = load i8*, i8** %arrayidx, align 8
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indirectbr i8* %target, [label %bb0, label %bb1]
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bb1:
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ret void
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}
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; Don't do anything for cases that contain no phis.
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define void @nophi(i32* %p) {
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; CHECK-LABEL: @nophi(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 1
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; CHECK-NEXT: [[INITOP:%.*]] = load i32, i32* [[INCDEC_PTR]], align 4
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; CHECK-NEXT: switch i32 [[INITOP]], label [[EXIT:%.*]] [
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; CHECK-NEXT: i32 0, label [[BB0:%.*]]
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; CHECK-NEXT: i32 1, label [[BB1:%.*]]
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; CHECK-NEXT: ]
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; CHECK: bb0:
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; CHECK-NEXT: tail call void @use(i32 0)
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; CHECK-NEXT: br label [[INDIRECTGOTO:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: tail call void @use(i32 1)
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; CHECK-NEXT: br label [[INDIRECTGOTO]]
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; CHECK: indirectgoto:
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; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[P]] to i8*
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; CHECK-NEXT: [[SUNKADDR:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i64 4
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[SUNKADDR]] to i32*
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; CHECK-NEXT: [[NEWP:%.*]] = load i32, i32* [[TMP1]], align 4
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; CHECK-NEXT: [[IDX:%.*]] = sext i32 [[NEWP]] to i64
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @nophi.targets, i64 0, i64 [[IDX]]
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; CHECK-NEXT: [[NEWOP:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8
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; CHECK-NEXT: indirectbr i8* [[NEWOP]], [label [[BB0]], label %bb1]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%incdec.ptr = getelementptr inbounds i32, i32* %p, i64 1
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%initop = load i32, i32* %incdec.ptr, align 4
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switch i32 %initop, label %exit [
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i32 0, label %bb0
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i32 1, label %bb1
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]
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bb0:
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tail call void @use(i32 0) br label %indirectgoto
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bb1:
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tail call void @use(i32 1)
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br label %indirectgoto
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indirectgoto:
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%newp = load i32, i32* %incdec.ptr, align 4
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%idx = sext i32 %newp to i64
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%arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @nophi.targets, i64 0, i64 %idx
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%newop = load i8*, i8** %arrayidx, align 8
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indirectbr i8* %newop, [label %bb0, label %bb1]
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exit:
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ret void
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}
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; Don't do anything if the edge isn't critical.
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define i32 @noncritical(i32 %k, i8* %p)
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; CHECK-LABEL: @noncritical(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[D:%.*]] = add i32 [[K:%.*]], 1
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; CHECK-NEXT: indirectbr i8* [[P:%.*]], [label [[BB0:%.*]], label %bb1]
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; CHECK: bb0:
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; CHECK-NEXT: [[R0:%.*]] = sub i32 [[K]], [[D]]
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|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
||
|
|
; CHECK: bb1:
|
||
|
|
; CHECK-NEXT: [[R1:%.*]] = sub i32 [[D]], [[K]]
|
||
|
|
; CHECK-NEXT: br label [[EXIT]]
|
||
|
|
; CHECK: exit:
|
||
|
|
; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[R0]], [[BB0]] ], [ [[R1]], [[BB1:%.*]] ]
|
||
|
|
; CHECK-NEXT: ret i32 0
|
||
|
|
;
|
||
|
|
{
|
||
|
|
entry:
|
||
|
|
%d = add i32 %k, 1
|
||
|
|
indirectbr i8* %p, [label %bb0, label %bb1]
|
||
|
|
|
||
|
|
bb0:
|
||
|
|
%v00 = phi i32 [%k, %entry]
|
||
|
|
%v01 = phi i32 [%d, %entry]
|
||
|
|
%r0 = sub i32 %v00, %v01
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
bb1:
|
||
|
|
%v10 = phi i32 [%d, %entry]
|
||
|
|
%v11 = phi i32 [%k, %entry]
|
||
|
|
%r1 = sub i32 %v10, %v11
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
exit:
|
||
|
|
%v = phi i32 [%r0, %bb0], [%r1, %bb1]
|
||
|
|
ret i32 0
|
||
|
|
}
|