113 lines
6.0 KiB
LLVM
113 lines
6.0 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -mtriple=i686-linux-gnu -atomic-expand %s | FileCheck %s
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define float @test_atomicrmw_fadd_f32(float* %ptr, float %value) {
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; CHECK-LABEL: @test_atomicrmw_fadd_f32(
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; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[PTR:%.*]], align 4
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast float* [[PTR]] to i32*
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
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; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg i32* [[TMP2]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
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; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
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; CHECK-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret float [[TMP6]]
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;
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%res = atomicrmw fadd float* %ptr, float %value seq_cst
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ret float %res
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}
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define double @test_atomicrmw_fadd_f64(double* %ptr, double %value) {
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; CHECK-LABEL: @test_atomicrmw_fadd_f64(
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; CHECK-NEXT: [[TMP1:%.*]] = load double, double* [[PTR:%.*]], align 8
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[NEW:%.*]] = fadd double [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast double* [[PTR]] to i64*
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast double [[NEW]] to i64
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
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; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg i64* [[TMP2]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
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; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
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; CHECK-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret double [[TMP6]]
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;
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%res = atomicrmw fadd double* %ptr, double %value seq_cst
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ret double %res
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}
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define float @test_atomicrmw_fadd_f32_as1(float addrspace(1)* %ptr, float %value) {
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; CHECK-LABEL: @test_atomicrmw_fadd_f32_as1(
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; CHECK-NEXT: [[TMP1:%.*]] = load float, float addrspace(1)* [[PTR:%.*]], align 4
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast float addrspace(1)* [[PTR]] to i32 addrspace(1)*
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
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; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg i32 addrspace(1)* [[TMP2]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
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; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
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; CHECK-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret float [[TMP6]]
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;
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%res = atomicrmw fadd float addrspace(1)* %ptr, float %value seq_cst
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ret float %res
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}
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define float @test_atomicrmw_fsub_f32(float* %ptr, float %value) {
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; CHECK-LABEL: @test_atomicrmw_fsub_f32(
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; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[PTR:%.*]], align 4
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[NEW:%.*]] = fsub float [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast float* [[PTR]] to i32*
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
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; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg i32* [[TMP2]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
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; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
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; CHECK-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret float [[TMP6]]
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;
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%res = atomicrmw fsub float* %ptr, float %value seq_cst
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ret float %res
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}
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define double @test_atomicrmw_fsub_f64(double* %ptr, double %value) {
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; CHECK-LABEL: @test_atomicrmw_fsub_f64(
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; CHECK-NEXT: [[TMP1:%.*]] = load double, double* [[PTR:%.*]], align 8
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[LOADED:%.*]] = phi double [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
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; CHECK-NEXT: [[NEW:%.*]] = fsub double [[LOADED]], [[VALUE:%.*]]
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast double* [[PTR]] to i64*
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast double [[NEW]] to i64
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast double [[LOADED]] to i64
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; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg i64* [[TMP2]], i64 [[TMP4]], i64 [[TMP3]] seq_cst seq_cst
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; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i64, i1 } [[TMP5]], 1
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; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i64, i1 } [[TMP5]], 0
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; CHECK-NEXT: [[TMP6]] = bitcast i64 [[NEWLOADED]] to double
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; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: ret double [[TMP6]]
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;
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%res = atomicrmw fsub double* %ptr, double %value seq_cst
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ret double %res
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}
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