50 lines
845 B
TableGen
50 lines
845 B
TableGen
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// RUN: llvm-tblgen %s | FileCheck %s
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// XFAIL: vg_leak
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class XD { bits<4> Prefix = 11; }
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// CHECK: Prefix = { 1, 1, 0, 0 };
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class XS { bits<4> Prefix = 12; }
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class VEX { bit hasVEX_4VPrefix = 1; }
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def xd : XD;
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class BaseI {
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bits<4> Prefix = 0;
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bit hasVEX_4VPrefix = 0;
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}
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class I<bits<4> op> : BaseI {
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bits<4> opcode = op;
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int val = !if(!eq(Prefix, xd.Prefix), 7, 21);
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int check = !if(hasVEX_4VPrefix, 0, 10);
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}
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multiclass R {
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def rr : I<4>;
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}
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multiclass M {
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def rm : I<2>;
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}
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multiclass Y {
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defm SS : R, M, XD;
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// CHECK: Prefix = { 1, 1, 0, 0 };
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// CHECK: Prefix = { 1, 1, 0, 0 };
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defm SD : R, M, XS;
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}
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// CHECK: int check = 0;
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defm Instr : Y, VEX;
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// Anonymous defm.
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multiclass SomeAnonymous<int x> {
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def rm;
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def mr;
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}
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// These multiclasses shouldn't conflict.
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defm : SomeAnonymous<1>;
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defm : SomeAnonymous<2>;
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