47 lines
1.2 KiB
TableGen
47 lines
1.2 KiB
TableGen
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// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
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include "llvm/Target/Target.td"
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def archInstrInfo : InstrInfo { }
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def arch : Target {
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let InstructionSet = archInstrInfo;
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}
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let OutOperandList = (outs), Size = 2 in {
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def foo : Instruction {
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let InOperandList = (ins i32imm:$factor);
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field bits<16> Inst;
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field bits<16> SoftFail = 0;
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bits<8> factor;
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let factor{0} = 0; // zero initial value
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let Inst{15...8} = factor{7...0};
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}
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def bar : Instruction {
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let InOperandList = (ins i32imm:$factor);
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field bits<16> Inst;
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field bits<16> SoftFail = 0;
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bits<8> factor;
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let factor{0} = 1; // non-zero initial value
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let Inst{15...8} = factor{7...0};
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}
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def bax : Instruction {
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let InOperandList = (ins i32imm:$factor);
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field bits<16> Inst;
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field bits<16> SoftFail = 0;
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bits<33> factor;
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let factor{32} = 1; // non-zero initial value
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let Inst{15...8} = factor{32...25};
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}
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}
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// CHECK: tmp = fieldFromInstruction(insn, 9, 7) << 1;
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// CHECK: tmp = 0x1;
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// CHECK: tmp |= fieldFromInstruction(insn, 9, 7) << 1;
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// CHECK: tmp = 0x100000000;
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// CHECK: tmp |= fieldFromInstruction(insn, 8, 7) << 25;
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