168 lines
3.9 KiB
Plaintext
168 lines
3.9 KiB
Plaintext
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# RUN: not llvm-mc -disassemble %s -show-encoding -triple thumbv8 2>&1 | FileCheck %s
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# Coprocessors other than CP10, CP11, CP14 and CP15 are undefined in ARMv8;
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# but in ARMv7, all these instructions are valid
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# RUN: llvm-mc -triple thumbv7 -show-encoding -disassemble %s | FileCheck %s --check-prefix=CHECK-V7
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[0x00 0xee 0x00 0x01]
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# CHECK-V7: cdp
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xee 0x00 0x01]
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[0x00 0xee 0x00 0x0e]
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# CHECK-V7: cdp
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xee 0x00 0x0e]
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[0x00 0xee 0x00 0x0f]
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# CHECK-V7: cdp
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xee 0x00 0x0f]
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[0x00 0xfe 0x00 0x01]
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# CHECK-V7: cdp2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xfe 0x00 0x01]
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[0x00 0xfe 0x00 0x0e]
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# CHECK-V7: cdp2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xfe 0x00 0x0e]
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[0x00 0xfe 0x00 0x0f]
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# CHECK-V7: cdp2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xfe 0x00 0x0f]
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[0x00 0xee 0x10 0x01]
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# CHECK-V7: mcr
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xee 0x10 0x01]
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[0x00 0xfe 0x10 0x01]
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# CHECK-V7: mcr2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xfe 0x10 0x01]
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[0x00 0xfe 0x10 0x0e]
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# CHECK-V7: mcr2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xfe 0x10 0x0e]
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[0x00 0xfe 0x10 0x0f]
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# CHECK-V7: mcr2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x00 0xfe 0x10 0x0f]
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[0x10 0xee 0x10 0x01]
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# CHECK-V7: mrc
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x10 0xee 0x10 0x01]
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[0x10 0xfe 0x10 0x01]
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# CHECK-V7: mrc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x10 0xfe 0x10 0x01]
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[0x10 0xfe 0x10 0x0e]
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# CHECK-V7: mrc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x10 0xfe 0x10 0x0e]
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[0x10 0xfe 0x10 0x0f]
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# CHECK-V7: mrc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x10 0xfe 0x10 0x0f]
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[0x40 0xec 0x00 0x01]
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# CHECK-V7: mcrr
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x40 0xec 0x00 0x01]
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[0x40 0xfc 0x00 0x01]
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# CHECK-V7: mcrr2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x40 0xfc 0x00 0x01]
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[0x40 0xfc 0x00 0x0e]
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# CHECK-V7: mcrr2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x40 0xfc 0x00 0x0e]
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[0x40 0xfc 0x00 0x0f]
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# CHECK-V7: mcrr2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x40 0xfc 0x00 0x0f]
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[0x50 0xec 0x00 0x01]
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# CHECK-V7: mrrc
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x50 0xec 0x00 0x01]
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[0x50 0xfc 0x00 0x0e]
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# CHECK-V7: mrrc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x50 0xfc 0x00 0x0e]
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[0x50 0xfc 0x00 0x0f]
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# CHECK-V7: mrrc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x50 0xfc 0x00 0x0f]
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[0x50 0xfc 0x00 0x01]
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# CHECK-V7: mrrc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x50 0xfc 0x00 0x01]
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[0x80 0xec 0x00 0x01]
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# CHECK-V7: stc
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x80 0xec 0x00 0x01]
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[0x80 0xec 0x00 0x0f]
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# CHECK-V7: stc
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x80 0xec 0x00 0x0f]
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[0x80 0xfc 0x00 0x01]
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# CHECK-V7: stc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x80 0xfc 0x00 0x01]
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[0x80 0xfc 0x00 0x0e]
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# CHECK-V7: stc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x80 0xfc 0x00 0x0e]
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[0x80 0xfc 0x00 0x0f]
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# CHECK-V7: stc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x80 0xfc 0x00 0x0f]
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[0x90 0xec 0x00 0x01]
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# CHECK-V7: ldc
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x90 0xec 0x00 0x01]
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[0x90 0xec 0x00 0x0f]
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# CHECK-V7: ldc
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x90 0xec 0x00 0x0f]
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[0x90 0xfc 0x00 0x01]
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# CHECK-V7: ldc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x90 0xfc 0x00 0x01]
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[0x90 0xfc 0x00 0x0e]
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# CHECK-V7: ldc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x90 0xfc 0x00 0x0e]
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[0x90 0xfc 0x00 0x0f]
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# CHECK-V7: ldc2
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x90 0xfc 0x00 0x0f]
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