181 lines
10 KiB
ArmAsm
181 lines
10 KiB
ArmAsm
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// RUN: not llvm-mc -triple=armv7a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
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// RUN: | FileCheck --check-prefix=CHECK-V7A-ARM %s
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// RUN: FileCheck --check-prefix=ERROR-V7A-ARM < %t %s
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// RUN: not llvm-mc -triple=thumbv7a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
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// RUN: | FileCheck --check-prefix=CHECK-V7A-THUMB %s
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// RUN: FileCheck --check-prefix=ERROR-V7A-THUMB < %t %s
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// RUN: not llvm-mc -triple=thumbv7m-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
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// RUN: | FileCheck --check-prefix=CHECK-V7M %s
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// RUN: FileCheck --check-prefix=ERROR-V7M < %t %s
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// RUN: not llvm-mc -triple=armv8a-arm-none-eabi -mattr=+fp-armv8 -show-encoding < %s 2>%t \
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// RUN: | FileCheck --check-prefix=CHECK-V8A-ARM %s
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// RUN: FileCheck --check-prefix=ERROR-V8A-ARM < %t %s
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// RUN: not llvm-mc -triple=thumbv8a-arm-none-eabi -mattr=+fp-armv8 -show-encoding < %s 2>%t \
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// RUN: | FileCheck --check-prefix=CHECK-V8A-THUMB %s
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// RUN: FileCheck --check-prefix=ERROR-V8A-THUMB < %t %s
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// RUN: not llvm-mc -triple=thumbv8m.main-arm-none-eabi -mattr=+fp-armv8 -show-encoding < %s 2>%t \
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// RUN: | FileCheck --check-prefix=CHECK-V8M %s
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// RUN: FileCheck --check-prefix=ERROR-V8M < %t %s
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// RUN: not llvm-mc -triple=thumbv7m-arm-none-eabi -show-encoding < %s 2>%t
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// RUN: FileCheck --check-prefix=ERROR-NOVFP < %t %s
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vmrs APSR_nzcv, fpscr
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vmrs apsr_nzcv, fpscr
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fmstat
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vmrs r10, fpscr
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vmrs r2, fpsid
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vmrs r3, FPSID
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vmrs r4, mvfr0
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vmrs r5, MVFR1
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vmrs r6, mvfr2
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vmrs sp, fpscr
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vmrs pc, fpscr
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// CHECK-V7A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee]
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// CHECK-V7A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee]
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// CHECK-V7A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee]
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// CHECK-V7A-ARM: vmrs r10, fpscr @ encoding: [0x10,0xaa,0xf1,0xee]
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// CHECK-V7A-ARM: vmrs r2, fpsid @ encoding: [0x10,0x2a,0xf0,0xee]
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// CHECK-V7A-ARM: vmrs r3, fpsid @ encoding: [0x10,0x3a,0xf0,0xee]
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// CHECK-V7A-ARM: vmrs r4, mvfr0 @ encoding: [0x10,0x4a,0xf7,0xee]
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// CHECK-V7A-ARM: vmrs r5, mvfr1 @ encoding: [0x10,0x5a,0xf6,0xee]
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// ERROR-V7A-ARM: instruction requires: FPARMv8
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// CHECK-V7A-ARM: vmrs sp, fpscr @ encoding: [0x10,0xda,0xf1,0xee]
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// ERROR-V7A-ARM: invalid operand for instruction
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// CHECK-V7A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V7A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V7A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V7A-THUMB: vmrs r10, fpscr @ encoding: [0xf1,0xee,0x10,0xaa]
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// CHECK-V7A-THUMB: vmrs r2, fpsid @ encoding: [0xf0,0xee,0x10,0x2a]
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// CHECK-V7A-THUMB: vmrs r3, fpsid @ encoding: [0xf0,0xee,0x10,0x3a]
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// CHECK-V7A-THUMB: vmrs r4, mvfr0 @ encoding: [0xf7,0xee,0x10,0x4a]
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// CHECK-V7A-THUMB: vmrs r5, mvfr1 @ encoding: [0xf6,0xee,0x10,0x5a]
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// ERROR-V7A-THUMB: instruction requires: FPARMv8
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// ERROR-V7A-THUMB: invalid operand for instruction
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// ERROR-V7A-THUMB: invalid operand for instruction
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// CHECK-V7M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V7M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V7M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V7M: vmrs r10, fpscr @ encoding: [0xf1,0xee,0x10,0xaa]
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// CHECK-V7M: vmrs r2, fpsid @ encoding: [0xf0,0xee,0x10,0x2a]
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// CHECK-V7M: vmrs r3, fpsid @ encoding: [0xf0,0xee,0x10,0x3a]
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// CHECK-V7M: vmrs r4, mvfr0 @ encoding: [0xf7,0xee,0x10,0x4a]
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// CHECK-V7M: vmrs r5, mvfr1 @ encoding: [0xf6,0xee,0x10,0x5a]
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// ERROR-V7M: instruction requires: FPARMv8
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// ERROR-V7M: invalid operand for instruction
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// ERROR-V7M: invalid operand for instruction
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// CHECK-V8A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee]
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// CHECK-V8A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee]
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// CHECK-V8A-ARM: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee]
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// CHECK-V8A-ARM: vmrs r10, fpscr @ encoding: [0x10,0xaa,0xf1,0xee]
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// CHECK-V8A-ARM: vmrs r2, fpsid @ encoding: [0x10,0x2a,0xf0,0xee]
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// CHECK-V8A-ARM: vmrs r3, fpsid @ encoding: [0x10,0x3a,0xf0,0xee]
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// CHECK-V8A-ARM: vmrs r4, mvfr0 @ encoding: [0x10,0x4a,0xf7,0xee]
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// CHECK-V8A-ARM: vmrs r5, mvfr1 @ encoding: [0x10,0x5a,0xf6,0xee]
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// CHECK-V8A-ARM: vmrs r6, mvfr2 @ encoding: [0x10,0x6a,0xf5,0xee]
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// CHECK-V8A-ARM: vmrs sp, fpscr @ encoding: [0x10,0xda,0xf1,0xee]
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// ERROR-V8A-ARM: invalid operand for instruction
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// CHECK-V8A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V8A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V8A-THUMB: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V8A-THUMB: vmrs r10, fpscr @ encoding: [0xf1,0xee,0x10,0xaa]
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// CHECK-V8A-THUMB: vmrs r2, fpsid @ encoding: [0xf0,0xee,0x10,0x2a]
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// CHECK-V8A-THUMB: vmrs r3, fpsid @ encoding: [0xf0,0xee,0x10,0x3a]
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// CHECK-V8A-THUMB: vmrs r4, mvfr0 @ encoding: [0xf7,0xee,0x10,0x4a]
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// CHECK-V8A-THUMB: vmrs r5, mvfr1 @ encoding: [0xf6,0xee,0x10,0x5a]
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// CHECK-V8A-THUMB: vmrs r6, mvfr2 @ encoding: [0xf5,0xee,0x10,0x6a]
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// CHECK-V8A-THUMB: vmrs sp, fpscr @ encoding: [0xf1,0xee,0x10,0xda]
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// ERROR-V8A-THUMB: invalid operand for instruction
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// CHECK-V8M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V8M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V8M: vmrs APSR_nzcv, fpscr @ encoding: [0xf1,0xee,0x10,0xfa]
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// CHECK-V8M: vmrs r10, fpscr @ encoding: [0xf1,0xee,0x10,0xaa]
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// CHECK-V8M: vmrs r2, fpsid @ encoding: [0xf0,0xee,0x10,0x2a]
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// CHECK-V8M: vmrs r3, fpsid @ encoding: [0xf0,0xee,0x10,0x3a]
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// CHECK-V8M: vmrs r4, mvfr0 @ encoding: [0xf7,0xee,0x10,0x4a]
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// CHECK-V8M: vmrs r5, mvfr1 @ encoding: [0xf6,0xee,0x10,0x5a]
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// CHECK-V8M: vmrs r6, mvfr2 @ encoding: [0xf5,0xee,0x10,0x6a]
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// ERROR-V8M: invalid operand for instruction
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// ERROR-V8M: invalid operand for instruction
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// ERROR-NOVFP: instruction requires: fp registers
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// ERROR-NOVFP: instruction requires: fp registers
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// ERROR-NOVFP: instruction requires: fp registers
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// ERROR-NOVFP: instruction requires: fp registers
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// ERROR-NOVFP: instruction requires: VFP2
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// ERROR-NOVFP: instruction requires: VFP2
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// ERROR-NOVFP: instruction requires: VFP2
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// ERROR-NOVFP: instruction requires: VFP2
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// ERROR-NOVFP: instruction requires: FPARMv8
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// ERROR-NOVFP: invalid instruction
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// ERROR-NOVFP: invalid instruction
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vmsr fpscr, APSR_nzcv
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vmsr fpscr, r0
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vmsr fpexc, r1
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vmsr fpsid, r2
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vmsr fpscr, r10
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vmsr fpscr, sp
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vmsr fpscr, pc
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// ERROR-V7A-ARM: operand must be a register in range [r0, r14]
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// CHECK-V7A-ARM: vmsr fpscr, r0 @ encoding: [0x10,0x0a,0xe1,0xee]
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// CHECK-V7A-ARM: vmsr fpexc, r1 @ encoding: [0x10,0x1a,0xe8,0xee]
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// CHECK-V7A-ARM: vmsr fpsid, r2 @ encoding: [0x10,0x2a,0xe0,0xee]
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// CHECK-V7A-ARM: vmsr fpscr, r10 @ encoding: [0x10,0xaa,0xe1,0xee]
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// CHECK-V7A-ARM: vmsr fpscr, sp @ encoding: [0x10,0xda,0xe1,0xee]
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// ERROR-V7A-ARM: operand must be a register in range [r0, r14]
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// ERROR-V7A-THUMB: operand must be a register in range [r0, r14]
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// CHECK-V7A-THUMB: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a]
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// CHECK-V7A-THUMB: vmsr fpexc, r1 @ encoding: [0xe8,0xee,0x10,0x1a]
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// CHECK-V7A-THUMB: vmsr fpsid, r2 @ encoding: [0xe0,0xee,0x10,0x2a]
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// CHECK-V7A-THUMB: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa]
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// ERROR-V7A-THUMB: invalid operand for instruction
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// ERROR-V7A-THUMB: operand must be a register in range [r0, r14]
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// ERROR-V7M: operand must be a register in range [r0, r14]
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// CHECK-V7M: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a]
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// CHECK-V7M: vmsr fpexc, r1 @ encoding: [0xe8,0xee,0x10,0x1a]
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// CHECK-V7M: vmsr fpsid, r2 @ encoding: [0xe0,0xee,0x10,0x2a]
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// CHECK-V7M: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa]
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// ERROR-V7M: invalid operand for instruction
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// ERROR-V7M: operand must be a register in range [r0, r14]
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// ERROR-V8A-ARM: operand must be a register in range [r0, r14]
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// CHECK-V8A-ARM: vmsr fpscr, r0 @ encoding: [0x10,0x0a,0xe1,0xee]
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// CHECK-V8A-ARM: vmsr fpexc, r1 @ encoding: [0x10,0x1a,0xe8,0xee]
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// CHECK-V8A-ARM: vmsr fpsid, r2 @ encoding: [0x10,0x2a,0xe0,0xee]
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// CHECK-V8A-ARM: vmsr fpscr, r10 @ encoding: [0x10,0xaa,0xe1,0xee]
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// CHECK-V8A-ARM: vmsr fpscr, sp @ encoding: [0x10,0xda,0xe1,0xee]
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// ERROR-V8A-ARM: operand must be a register in range [r0, r14]
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// ERROR-V8A-THUMB: operand must be a register in range [r0, r14]
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// CHECK-V8A-THUMB: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a]
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// CHECK-V8A-THUMB: vmsr fpexc, r1 @ encoding: [0xe8,0xee,0x10,0x1a]
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// CHECK-V8A-THUMB: vmsr fpsid, r2 @ encoding: [0xe0,0xee,0x10,0x2a]
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// CHECK-V8A-THUMB: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa]
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// CHECK-V8A-THUMB: vmsr fpscr, sp @ encoding: [0xe1,0xee,0x10,0xda]
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// ERROR-V8A-THUMB: operand must be a register in range [r0, r14]
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// ERROR-V8M: operand must be a register in range [r0, r14]
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// CHECK-V8M: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a]
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// CHECK-V8M: vmsr fpexc, r1 @ encoding: [0xe8,0xee,0x10,0x1a]
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// CHECK-V8M: vmsr fpsid, r2 @ encoding: [0xe0,0xee,0x10,0x2a]
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// CHECK-V8M: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa]
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// ERROR-V8M: invalid operand for instruction
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// ERROR-V8M: operand must be a register in range [r0, r14]
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// ERROR-NOVFP: invalid instruction
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// ERROR-NOVFP: instruction requires: fp registers
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// ERROR-NOVFP: instruction requires: VFP2
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// ERROR-NOVFP: instruction requires: VFP2
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// ERROR-NOVFP: instruction requires: fp registers
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// ERROR-NOVFP: invalid instruction
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// ERROR-NOVFP: invalid instruction
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