llvm-for-llvmta/test/MC/ARM/negative-immediates-thumb1.s

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ArmAsm
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2022-04-25 10:02:23 +02:00
# RUN: llvm-mc -triple thumbv7 -mcpu=cortex-m0 %s -show-encoding | FileCheck %s
# RUN: not llvm-mc -triple thumbv7 -mcpu=cortex-m0 %s -show-encoding -mattr=+no-neg-immediates 2>&1 | FileCheck %s -check-prefix=CHECK-DISABLED
.thumb
ADDs r1, r0, #0xFFFFFFF9
# CHECK: subs r1, r0, #7
# CHECK-DISABLED: note: instruction requires: NegativeImmediates
ADDs r0, #0xFFFFFF01
# CHECK: subs r0, #255
# CHECK-DISABLED: note: instruction requires: NegativeImmediates
SUBs r0, #0xFFFFFF01
# CHECK: adds r0, #255
# CHECK-DISABLED: note: instruction requires: NegativeImmediates
SUBs r1, r0, #0xFFFFFFF9
# CHECK: adds r1, r0, #7
# CHECK-DISABLED: note: instruction requires: NegativeImmediates