llvm-for-llvmta/test/MC/AArch64/SVE2/whilewr-diagnostics.s

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2022-04-25 10:02:23 +02:00
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid scalar registers
whilewr p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilewr p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilewr p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilewr p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilewr p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilewr p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilewr p15.b, w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilewr p15.b, w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: