79 lines
2.9 KiB
ArmAsm
79 lines
2.9 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
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srshr z18.b, p0/m, z18.b, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8]
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// CHECK-NEXT: srshr z18.b, p0/m, z18.b, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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srshr z1.b, p0/m, z1.b, #9
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 8]
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// CHECK-NEXT: srshr z1.b, p0/m, z1.b, #9
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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srshr z21.h, p0/m, z21.h, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
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// CHECK-NEXT: srshr z21.h, p0/m, z21.h, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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srshr z14.h, p0/m, z14.h, #17
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
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// CHECK-NEXT: srshr z14.h, p0/m, z14.h, #17
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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srshr z6.s, p0/m, z6.s, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 32]
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// CHECK-NEXT: srshr z6.s, p0/m, z6.s, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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srshr z23.s, p0/m, z23.s, #33
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 32]
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// CHECK-NEXT: srshr z23.s, p0/m, z23.s, #33
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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srshr z3.d, p0/m, z3.d, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 64]
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// CHECK-NEXT: srshr z3.d, p0/m, z3.d, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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srshr z25.d, p0/m, z25.d, #65
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 64]
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// CHECK-NEXT: srshr z25.d, p0/m, z25.d, #65
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Source and Destination Registers must match
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srshr z0.b, p0/m, z1.b, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
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// CHECK-NEXT: srshr z0.b, p0/m, z1.b, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Element sizes must match
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srshr z0.b, p0/m, z0.d, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: srshr z0.b, p0/m, z0.d, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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srshr z0.d, p0/m, z0.b, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: srshr z0.d, p0/m, z0.b, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid predicate
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srshr z0.b, p0/z, z0.b, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: srshr z0.b, p0/z, z0.b, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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srshr z0.b, p8/m, z0.b, #1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: srshr z0.b, p8/m, z0.b, #1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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