43 lines
1.6 KiB
ArmAsm
43 lines
1.6 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
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// --------------------------------------------------------------------------//
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// Element sizes must match
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sadalp z0.b, p0/m, z1.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sadalp z0.b, p0/m, z1.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sadalp z0.h, p0/m, z1.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sadalp z0.h, p0/m, z1.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sadalp z0.s, p0/m, z1.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sadalp z0.s, p0/m, z1.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sadalp z0.d, p0/m, z1.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: sadalp z0.d, p0/m, z1.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Predicate not in restricted predicate range
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sadalp z0.h, p8/m, z1.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: sadalp z0.h, p8/m, z1.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative movprfx tests
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movprfx z31.s, p0/z, z6.s // element type of the source operand, rather than destination.
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sadalp z31.d, p0/m, z30.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx with a different element size
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// CHECK-NEXT: sadalp z31.d, p0/m, z30.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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