51 lines
1.8 KiB
ArmAsm
51 lines
1.8 KiB
ArmAsm
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
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// RUN: | llvm-objdump -d --mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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fcvtx z0.s, p0/m, z0.d
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// CHECK-INST: fcvtx z0.s, p0/m, z0.d
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// CHECK-ENCODING: [0x00,0xa0,0x0a,0x65]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: 00 a0 0a 65 <unknown>
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fcvtx z30.s, p7/m, z31.d
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// CHECK-INST: fcvtx z30.s, p7/m, z31.d
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// CHECK-ENCODING: [0xfe,0xbf,0x0a,0x65]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: fe bf 0a 65 <unknown>
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// --------------------------------------------------------------------------//
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// Test compatibility with MOVPRFX instruction.
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movprfx z5.d, p0/z, z7.d
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// CHECK-INST: movprfx z5.d, p0/z, z7.d
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// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
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fcvtx z5.s, p0/m, z0.d
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// CHECK-INST: fcvtx z5.s, p0/m, z0.d
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// CHECK-ENCODING: [0x05,0xa0,0x0a,0x65]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: 05 a0 0a 65 <unknown>
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movprfx z5, z7
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// CHECK-INST: movprfx z5, z7
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// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
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fcvtx z5.s, p0/m, z0.d
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// CHECK-INST: fcvtx z5.s, p0/m, z0.d
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// CHECK-ENCODING: [0x05,0xa0,0x0a,0x65]
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// CHECK-ERROR: instruction requires: sve2
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// CHECK-UNKNOWN: 05 a0 0a 65 <unknown>
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