109 lines
3.4 KiB
ArmAsm
109 lines
3.4 KiB
ArmAsm
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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insr z0.b, w0
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// CHECK-INST: insr z0.b, w0
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// CHECK-ENCODING: [0x00,0x38,0x24,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 38 24 05 <unknown>
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insr z0.h, w0
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// CHECK-INST: insr z0.h, w0
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// CHECK-ENCODING: [0x00,0x38,0x64,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 38 64 05 <unknown>
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insr z0.s, w0
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// CHECK-INST: insr z0.s, w0
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// CHECK-ENCODING: [0x00,0x38,0xa4,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 38 a4 05 <unknown>
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insr z0.d, x0
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// CHECK-INST: insr z0.d, x0
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// CHECK-ENCODING: [0x00,0x38,0xe4,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 38 e4 05 <unknown>
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insr z31.b, wzr
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// CHECK-INST: insr z31.b, wzr
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// CHECK-ENCODING: [0xff,0x3b,0x24,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3b 24 05 <unknown>
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insr z31.h, wzr
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// CHECK-INST: insr z31.h, wzr
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// CHECK-ENCODING: [0xff,0x3b,0x64,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3b 64 05 <unknown>
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insr z31.s, wzr
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// CHECK-INST: insr z31.s, wzr
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// CHECK-ENCODING: [0xff,0x3b,0xa4,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3b a4 05 <unknown>
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insr z31.d, xzr
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// CHECK-INST: insr z31.d, xzr
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// CHECK-ENCODING: [0xff,0x3b,0xe4,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3b e4 05 <unknown>
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insr z31.b, b31
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// CHECK-INST: insr z31.b, b31
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// CHECK-ENCODING: [0xff,0x3b,0x34,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3b 34 05 <unknown>
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insr z31.h, h31
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// CHECK-INST: insr z31.h, h31
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// CHECK-ENCODING: [0xff,0x3b,0x74,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3b 74 05 <unknown>
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insr z31.s, s31
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// CHECK-INST: insr z31.s, s31
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// CHECK-ENCODING: [0xff,0x3b,0xb4,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3b b4 05 <unknown>
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insr z31.d, d31
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// CHECK-INST: insr z31.d, d31
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// CHECK-ENCODING: [0xff,0x3b,0xf4,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3b f4 05 <unknown>
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// --------------------------------------------------------------------------//
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// Test compatibility with MOVPRFX instruction.
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movprfx z31, z6
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// CHECK-INST: movprfx z31, z6
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// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: df bc 20 04 <unknown>
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insr z31.d, xzr
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// CHECK-INST: insr z31.d, xzr
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// CHECK-ENCODING: [0xff,0x3b,0xe4,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 3b e4 05 <unknown>
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movprfx z4, z6
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// CHECK-INST: movprfx z4, z6
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// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
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insr z4.d, d31
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// CHECK-INST: insr z4.d, d31
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// CHECK-ENCODING: [0xe4,0x3b,0xf4,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e4 3b f4 05 <unknown>
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