87 lines
3.4 KiB
ArmAsm
87 lines
3.4 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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// ------------------------------------------------------------------------- //
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// Invalid immediates (must be 0.5 or 1.0)
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fsub z0.h, p0/m, z0.h, #0.0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
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// CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub z0.h, p0/m, z0.h, #0.4999999999999999999999999
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
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// CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.4999999999999999999999999
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub z0.h, p0/m, z0.h, #0.5000000000000000000000001
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
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// CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5000000000000000000000001
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub z0.h, p0/m, z0.h, #1.0000000000000000000000001
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
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// CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0000000000000000000000001
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub z0.h, p0/m, z0.h, #0.9999999999999999999999999
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
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// CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.9999999999999999999999999
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Tied operands must match
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fsub z0.h, p7/m, z1.h, z31.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
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// CHECK-NEXT: fsub z0.h, p7/m, z1.h, z31.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Invalid element widths.
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fsub z0.b, p7/m, z0.b, z31.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fsub z0.b, p7/m, z0.b, z31.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub z0.h, p7/m, z0.h, z31.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fsub z0.h, p7/m, z0.h, z31.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub z0.b, z1.b, z2.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fsub z0.b, z1.b, z2.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fsub z0.h, z1.s, z2.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fsub z0.h, z1.s, z2.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Invalid predicate
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fsub z0.h, p8/m, z0.h, z31.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: fsub z0.h, p8/m, z0.h, z31.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0.d, p0/z, z7.d
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fsub z0.d, z1.d, z31.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: fsub z0.d, z1.d, z31.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z0, z7
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fsub z0.d, z1.d, z31.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: fsub z0.d, z1.d, z31.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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