31 lines
1.1 KiB
ArmAsm
31 lines
1.1 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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// ------------------------------------------------------------------------- //
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// Invalid destination or source register.
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fexpa z0.b, z31.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fexpa z0.b, z31.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fexpa z0.s, z31.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fexpa z0.s, z31.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0.d, p0/z, z7.d
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fexpa z0.d, z31.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: fexpa z0.d, z31.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z0, z7
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fexpa z0.d, z31.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: fexpa z0.d, z31.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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