63 lines
2.5 KiB
ArmAsm
63 lines
2.5 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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// --------------------------------------------------------------------------//
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// Restricted predicate out of range.
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fcmla z0.d, p8/m, z1.d, z2.d, #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: fcmla z0.d, p8/m, z1.d, z2.d, #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid rotation
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fcmla z0.d, p0/m, z1.d, z2.d, #360
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: complex rotation must be 0, 90, 180 or 270.
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// CHECK-NEXT: fcmla z0.d, p0/m, z1.d, z2.d, #360
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fcmla z0.d, p0/m, z1.d, z2.d, #450
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: complex rotation must be 0, 90, 180 or 270.
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// CHECK-NEXT: fcmla z0.d, p0/m, z1.d, z2.d, #450
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Index out of bounds or invalid for element size
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fcmla z0.h, z1.h, z2.h[-1], #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: fcmla z0.h, z1.h, z2.h[-1], #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fcmla z0.h, z1.h, z2.h[4], #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: fcmla z0.h, z1.h, z2.h[4], #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fcmla z0.s, z1.s, z2.s[-1], #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
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// CHECK-NEXT: fcmla z0.s, z1.s, z2.s[-1], #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fcmla z0.s, z1.s, z2.s[2], #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
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// CHECK-NEXT: fcmla z0.s, z1.s, z2.s[2], #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fcmla z0.d, z1.d, z2.d[0], #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
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// CHECK-NEXT: fcmla z0.d, z1.d, z2.d[0], #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z21.s, p0/z, z28.s
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fcmla z21.s, z10.s, z5.s[1], #90
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
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// CHECK-NEXT: fcmla z21.s, z10.s, z5.s[1], #90
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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