59 lines
1.9 KiB
ArmAsm
59 lines
1.9 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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// ------------------------------------------------------------------------- //
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// Invalid result register
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decp sp, p0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
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// CHECK-NEXT: decp sp, p0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decp z0.b, p0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: decp z0.b, p0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Invalid predicate operand
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decp x0, p0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: decp x0, p0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decp x0, p0/z
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: decp x0, p0/z
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decp x0, p0/m
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: decp x0, p0/m
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decp x0, p0.q
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: decp x0, p0.q
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decp z0.d, p0.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: decp z0.d, p0.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decp z0.d, p0.q
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
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// CHECK-NEXT: decp z0.d, p0.q
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z31.d, p7/z, z6.d
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decp z31.d, p7
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
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// CHECK-NEXT: decp z31.d, p7
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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