61 lines
2.7 KiB
LLVM
61 lines
2.7 KiB
LLVM
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; RUN: opt < %s -dfsan -S | FileCheck %s --check-prefix=LEGACY
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; RUN: opt < %s -dfsan -dfsan-args-abi -S | FileCheck %s --check-prefix=ARGS_ABI
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; RUN: opt < %s -dfsan -dfsan-fast-16-labels=true -S | FileCheck %s --check-prefix=FAST16
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define <4 x i4> @pass_vector(<4 x i4> %v) {
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; ARGS_ABI: @"dfs$pass_vector"
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; ARGS_ABI: ret { <4 x i4>, i16 }
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; FAST16: @"dfs$pass_vector"
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; FAST16: {{.*}} = load i16, i16* bitcast ([100 x i64]* @__dfsan_arg_tls to i16*), align [[ALIGN:2]]
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; FAST16: store i16 %1, i16* bitcast ([100 x i64]* @__dfsan_retval_tls to i16*), align [[ALIGN]]
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ret <4 x i4> %v
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}
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define void @load_update_store_vector(<4 x i4>* %p) {
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; FAST16: @"dfs$load_update_store_vector"
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; FAST16: {{.*}} = load i16, i16* bitcast ([100 x i64]* @__dfsan_arg_tls to i16*), align 2
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%v = load <4 x i4>, <4 x i4>* %p
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%e2 = extractelement <4 x i4> %v, i32 2
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%v1 = insertelement <4 x i4> %v, i4 %e2, i32 0
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store <4 x i4> %v1, <4 x i4>* %p
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ret void
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}
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define <4 x i1> @icmp_vector(<4 x i8> %a, <4 x i8> %b) {
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; LEGACY: @"dfs$icmp_vector"
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; LEGACY: [[B:%.*]] = load i16, i16* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i16*), align [[ALIGN:2]]
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; LEGACY: [[A:%.*]] = load i16, i16* bitcast ([100 x i64]* @__dfsan_arg_tls to i16*), align [[ALIGN]]
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; LEGACY: [[U:%.*]] = call zeroext i16 @__dfsan_union(i16 zeroext [[A]], i16 zeroext [[B]])
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; LEGACY: [[PH:%.*]] = phi i16 [ [[U]], {{.*}} ], [ [[A]], {{.*}} ]
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; LEGACY: store i16 [[PH]], i16* bitcast ([100 x i64]* @__dfsan_retval_tls to i16*), align [[ALIGN]]
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%r = icmp eq <4 x i8> %a, %b
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ret <4 x i1> %r
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}
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define <2 x i32> @const_vector() {
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; LEGACY: @"dfs$const_vector"
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; LEGACY: store i16 0, i16* bitcast ([100 x i64]* @__dfsan_retval_tls to i16*), align 2
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; FAST16: @"dfs$const_vector"
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; FAST16: store i16 0, i16* bitcast ([100 x i64]* @__dfsan_retval_tls to i16*), align 2
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ret <2 x i32> < i32 42, i32 11 >
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}
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define <4 x i4> @call_vector(<4 x i4> %v) {
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; LEGACY: @"dfs$call_vector"
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; LEGACY: [[V:%.*]] = load i16, i16* bitcast ([100 x i64]* @__dfsan_arg_tls to i16*), align [[ALIGN:2]]
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; LEGACY: store i16 [[V]], i16* bitcast ([100 x i64]* @__dfsan_arg_tls to i16*), align [[ALIGN]]
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; LEGACY: %_dfsret = load i16, i16* bitcast ([100 x i64]* @__dfsan_retval_tls to i16*), align [[ALIGN]]
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; LEGACY: store i16 %_dfsret, i16* bitcast ([100 x i64]* @__dfsan_retval_tls to i16*), align [[ALIGN]]
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%r = call <4 x i4> @pass_vector(<4 x i4> %v)
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ret <4 x i4> %r
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}
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