47 lines
1.6 KiB
Plaintext
47 lines
1.6 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AVX
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f,+avx512vl -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AVX512VL
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--- |
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define void @test_unmerge() {
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ret void
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}
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...
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---
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name: test_unmerge
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#
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alignment: 16
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legalized: true
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regBankSelected: true
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#
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registers:
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- { id: 0, class: vecr }
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- { id: 1, class: vecr }
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- { id: 2, class: vecr }
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#
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body: |
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bb.1 (%ir-block.0):
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; AVX-LABEL: name: test_unmerge
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; AVX: [[DEF:%[0-9]+]]:vr256 = IMPLICIT_DEF
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; AVX: [[COPY:%[0-9]+]]:vr128 = COPY [[DEF]].sub_xmm
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; AVX: [[VEXTRACTF128rr:%[0-9]+]]:vr128 = VEXTRACTF128rr [[DEF]], 1
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; AVX: $xmm0 = COPY [[COPY]]
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; AVX: $xmm1 = COPY [[VEXTRACTF128rr]]
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; AVX: RET 0, implicit $xmm0, implicit $xmm1
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; AVX512VL-LABEL: name: test_unmerge
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; AVX512VL: [[DEF:%[0-9]+]]:vr256x = IMPLICIT_DEF
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; AVX512VL: [[COPY:%[0-9]+]]:vr128x = COPY [[DEF]].sub_xmm
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; AVX512VL: [[VEXTRACTF32x4Z256rr:%[0-9]+]]:vr128x = VEXTRACTF32x4Z256rr [[DEF]], 1
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; AVX512VL: $xmm0 = COPY [[COPY]]
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; AVX512VL: $xmm1 = COPY [[VEXTRACTF32x4Z256rr]]
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; AVX512VL: RET 0, implicit $xmm0, implicit $xmm1
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%0(<8 x s32>) = IMPLICIT_DEF
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%1(<4 x s32>), %2(<4 x s32>) = G_UNMERGE_VALUES %0(<8 x s32>)
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$xmm0 = COPY %1(<4 x s32>)
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$xmm1 = COPY %2(<4 x s32>)
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RET 0, implicit $xmm0, implicit $xmm1
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...
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