llvm-for-llvmta/test/CodeGen/X86/GlobalISel/select-copy.mir

# RUN: llc -mtriple=i386-linux-gnu   -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64

--- |

  define void @test_copy() {
    ret void
  }

  define void @test_copy2() {
    ret void
  }

  define void @test_copy3() {
    ret void
  }

  define void @test_copy4() {
    ret void
  }

  define void @test_copy5() {
    ret void
  }

  define void @test_copy6() {
    ret void
  }

...
---
name:            test_copy
# ALL-LABEL: name:  test_copy
alignment:       16
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
# ALL:          %0:gr8 = COPY $al
# ALL-NEXT:     %1:gr32 = MOVZX32rr8 %0
# ALL-NEXT:     $eax = COPY %1
# ALL-NEXT:     RET 0, implicit $eax
body:             |
  bb.1 (%ir-block.0):
    liveins: $eax

    %0(s8) = COPY $al
    %1(s32) = G_ZEXT %0(s8)
    $eax = COPY %1(s32)
    RET 0, implicit $eax

...
---
name:            test_copy2
# ALL-LABEL: name:  test_copy2
alignment:       16
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
# ALL:          %0:gr8 = COPY $al
# ALL-NEXT:     %1:gr32 = MOVZX32rr8 %0
# ALL-NEXT:     $eax = COPY %1
# ALL-NEXT:     RET 0, implicit $eax
body:             |
  bb.1 (%ir-block.0):
    liveins: $eax

    %0(s8) = COPY $al
    %1(s32) = G_ZEXT %0(s8)
    $eax = COPY %1(s32)
    RET 0, implicit $eax

...
---
name:            test_copy3
# ALL-LABEL: name:  test_copy3
alignment:       16
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr16[[ABCD:(_abcd)?]], preferred-register: '' }
# X32-NEXT:   - { id: 1, class: gr8_abcd_l, preferred-register: '' }
# X64-NEXT:   - { id: 1, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 2, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
  - { id: 2, class: gpr, preferred-register: '' }
# ALL:          %0:gr16 = COPY $ax
# X32-NEXT:     %3:gr16_abcd = COPY %0
# X32-NEXT:     %1:gr8_abcd_l = COPY %3.sub_8bit
# X64-NEXT:     %1:gr8 = COPY %0.sub_8bit
# ALL-NEXT:     %2:gr32 = MOVZX32rr8 %1
# ALL-NEXT:     $eax = COPY %2
# ALL-NEXT:     RET 0, implicit $eax
body:             |
  bb.1 (%ir-block.0):
    liveins: $eax

    %0(s16) = COPY $ax
    %1(s8) = G_TRUNC %0(s16)
    %2(s32) = G_ZEXT %1(s8)
    $eax = COPY %2(s32)
    RET 0, implicit $eax

...
---
name:            test_copy4
# ALL-LABEL: name:  test_copy4
alignment:       16
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr32, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr16, preferred-register: '' }
# ALL-NEXT:   - { id: 2, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
  - { id: 2, class: gpr, preferred-register: '' }
# ALL:          %0:gr32 = COPY $eax
# ALL-NEXT:     %1:gr16 = COPY %0.sub_16bit
# ALL-NEXT:     %2:gr32 = MOVZX32rr16 %1
# ALL-NEXT:     $eax = COPY %2
# ALL-NEXT:     RET 0, implicit $eax
body:             |
  bb.1 (%ir-block.0):
    liveins: $eax

    %0(s32) = COPY $eax
    %1(s16) = G_TRUNC %0(s32)
    %2(s32) = G_ZEXT %1(s16)
    $eax = COPY %2(s32)
    RET 0, implicit $eax

...
---
name:            test_copy5
# ALL-LABEL: name:  test_copy5
alignment:       16
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr32[[ABCD:(_abcd)?]], preferred-register: '' }
# X32-NEXT:   - { id: 1, class: gr8_abcd_l, preferred-register: '' }
# X64-NEXT:   - { id: 1, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 2, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
  - { id: 2, class: gpr, preferred-register: '' }
# ALL:          %0:gr32 = COPY $edx
# X32-NEXT:     %3:gr32_abcd = COPY %0
# X32-NEXT:     %1:gr8_abcd_l = COPY %3.sub_8bit
# X64-NEXT:     %1:gr8 = COPY %0.sub_8bit
# ALL-NEXT:     %2:gr32 = MOVZX32rr8 %1
# ALL-NEXT:     $eax = COPY %2
# ALL-NEXT:     RET 0, implicit $eax
body:             |
  bb.1 (%ir-block.0):
    liveins: $eax,$edx

    %0(s32) = COPY $edx
    %1(s8) = G_TRUNC %0(s32)
    %2(s32) = G_ANYEXT %1(s8)
    $eax = COPY %2(s32)
    RET 0, implicit $eax

...
---
name:            test_copy6
# ALL-LABEL: name:  test_copy6
alignment:       16
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr32, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr16, preferred-register: '' }
# ALL-NEXT:   - { id: 2, class: low32_addr_access_rbp, preferred-register: '' }
# ALL-NEXT:   - { id: 3, class: low32_addr_access_rbp, preferred-register: '' }
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
  - { id: 2, class: gpr, preferred-register: '' }
# ALL:         %0:gr32 = COPY $edx
# ALL-NEXT:    %1:gr16 = COPY %0.sub_16bit
# ALL-NEXT:    %3:low32_addr_access_rbp = IMPLICIT_DEF
# ALL-NEXT:    %2:low32_addr_access_rbp = INSERT_SUBREG %3, %1, %subreg.sub_16bit
# ALL-NEXT:    $eax = COPY %2
# ALL-NEXT:    RET 0, implicit $eax
body:             |
  bb.1 (%ir-block.0):
    liveins: $eax,$edx

    %0(s32) = COPY $edx
    %1(s16) = G_TRUNC %0(s32)
    %2(s32) = G_ANYEXT %1(s16)
    $eax = COPY %2(s32)
    RET 0, implicit $eax

...