86 lines
3.2 KiB
LLVM
86 lines
3.2 KiB
LLVM
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||
|
|
; RUN: llc -mtriple riscv32 -mattr=+experimental-v %s -o - \
|
||
|
|
; RUN: -verify-machineinstrs | FileCheck %s
|
||
|
|
; RUN: llc -mtriple riscv64 -mattr=+experimental-v %s -o - \
|
||
|
|
; RUN: -verify-machineinstrs | FileCheck %s
|
||
|
|
|
||
|
|
define void @vadd_vint32m1(<vscale x 2 x i32> *%pc, <vscale x 2 x i32> *%pa, <vscale x 2 x i32> *%pb) nounwind {
|
||
|
|
; CHECK-LABEL: vadd_vint32m1:
|
||
|
|
; CHECK: # %bb.0:
|
||
|
|
; CHECK-NEXT: vsetvli a3, zero, e32,m1,ta,mu
|
||
|
|
; CHECK-NEXT: vle32.v v25, (a1)
|
||
|
|
; CHECK-NEXT: vle32.v v26, (a2)
|
||
|
|
; CHECK-NEXT: vadd.vv v25, v25, v26
|
||
|
|
; CHECK-NEXT: vse32.v v25, (a0)
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%va = load <vscale x 2 x i32>, <vscale x 2 x i32>* %pa
|
||
|
|
%vb = load <vscale x 2 x i32>, <vscale x 2 x i32>* %pb
|
||
|
|
%vc = add <vscale x 2 x i32> %va, %vb
|
||
|
|
store <vscale x 2 x i32> %vc, <vscale x 2 x i32> *%pc
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @vadd_vint32m2(<vscale x 4 x i32> *%pc, <vscale x 4 x i32> *%pa, <vscale x 4 x i32> *%pb) nounwind {
|
||
|
|
; CHECK-LABEL: vadd_vint32m2:
|
||
|
|
; CHECK: # %bb.0:
|
||
|
|
; CHECK-NEXT: vsetvli a3, zero, e32,m2,ta,mu
|
||
|
|
; CHECK-NEXT: vle32.v v26, (a1)
|
||
|
|
; CHECK-NEXT: vle32.v v28, (a2)
|
||
|
|
; CHECK-NEXT: vadd.vv v26, v26, v28
|
||
|
|
; CHECK-NEXT: vse32.v v26, (a0)
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%va = load <vscale x 4 x i32>, <vscale x 4 x i32>* %pa
|
||
|
|
%vb = load <vscale x 4 x i32>, <vscale x 4 x i32>* %pb
|
||
|
|
%vc = add <vscale x 4 x i32> %va, %vb
|
||
|
|
store <vscale x 4 x i32> %vc, <vscale x 4 x i32> *%pc
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @vadd_vint32m4(<vscale x 8 x i32> *%pc, <vscale x 8 x i32> *%pa, <vscale x 8 x i32> *%pb) nounwind {
|
||
|
|
; CHECK-LABEL: vadd_vint32m4:
|
||
|
|
; CHECK: # %bb.0:
|
||
|
|
; CHECK-NEXT: vsetvli a3, zero, e32,m4,ta,mu
|
||
|
|
; CHECK-NEXT: vle32.v v28, (a1)
|
||
|
|
; CHECK-NEXT: vle32.v v8, (a2)
|
||
|
|
; CHECK-NEXT: vadd.vv v28, v28, v8
|
||
|
|
; CHECK-NEXT: vse32.v v28, (a0)
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%va = load <vscale x 8 x i32>, <vscale x 8 x i32>* %pa
|
||
|
|
%vb = load <vscale x 8 x i32>, <vscale x 8 x i32>* %pb
|
||
|
|
%vc = add <vscale x 8 x i32> %va, %vb
|
||
|
|
store <vscale x 8 x i32> %vc, <vscale x 8 x i32> *%pc
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @vadd_vint32m8(<vscale x 16 x i32> *%pc, <vscale x 16 x i32> *%pa, <vscale x 16 x i32> *%pb) nounwind {
|
||
|
|
; CHECK-LABEL: vadd_vint32m8:
|
||
|
|
; CHECK: # %bb.0:
|
||
|
|
; CHECK-NEXT: vsetvli a3, zero, e32,m8,ta,mu
|
||
|
|
; CHECK-NEXT: vle32.v v8, (a1)
|
||
|
|
; CHECK-NEXT: vle32.v v16, (a2)
|
||
|
|
; CHECK-NEXT: vadd.vv v8, v8, v16
|
||
|
|
; CHECK-NEXT: vse32.v v8, (a0)
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%va = load <vscale x 16 x i32>, <vscale x 16 x i32>* %pa
|
||
|
|
%vb = load <vscale x 16 x i32>, <vscale x 16 x i32>* %pb
|
||
|
|
%vc = add <vscale x 16 x i32> %va, %vb
|
||
|
|
store <vscale x 16 x i32> %vc, <vscale x 16 x i32> *%pc
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @vadd_vint32mf2(<vscale x 1 x i32> *%pc, <vscale x 1 x i32> *%pa, <vscale x 1 x i32> *%pb) nounwind {
|
||
|
|
; CHECK-LABEL: vadd_vint32mf2:
|
||
|
|
; CHECK: # %bb.0:
|
||
|
|
; CHECK-NEXT: vsetvli a3, zero, e32,mf2,ta,mu
|
||
|
|
; CHECK-NEXT: vle32.v v25, (a1)
|
||
|
|
; CHECK-NEXT: vle32.v v26, (a2)
|
||
|
|
; CHECK-NEXT: vadd.vv v25, v25, v26
|
||
|
|
; CHECK-NEXT: vse32.v v25, (a0)
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%va = load <vscale x 1 x i32>, <vscale x 1 x i32>* %pa
|
||
|
|
%vb = load <vscale x 1 x i32>, <vscale x 1 x i32>* %pb
|
||
|
|
%vc = add <vscale x 1 x i32> %va, %vb
|
||
|
|
store <vscale x 1 x i32> %vc, <vscale x 1 x i32> *%pc
|
||
|
|
ret void
|
||
|
|
}
|