212 lines
5.8 KiB
LLVM
212 lines
5.8 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \
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; RUN: --check-prefixes=CHECK,CHECK-LE
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | FileCheck %s \
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; RUN: --check-prefixes=CHECK,CHECK-BE
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; This file does not contain many test cases involving comparisons and logical
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; comparisons (cmplwi, cmpldi). This is because alternative code is generated
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; when there is a compare (logical or not), followed by a sign or zero extend.
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; This codegen will be re-evaluated at a later time on whether or not it should
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; be emitted on P10.
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@globalVal = common dso_local local_unnamed_addr global i8 0, align 1
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@globalVal2 = common dso_local local_unnamed_addr global i32 0, align 4
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@globalVal3 = common dso_local local_unnamed_addr global i64 0, align 8
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@globalVal4 = common dso_local local_unnamed_addr global i16 0, align 2
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define dso_local signext i32 @setbcr1(i8 %a) {
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; CHECK-LABEL: setbcr1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: clrlwi r3, r3, 24
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i8 %a, 1
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define dso_local signext i32 @setbcr2(i32 %a) {
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; CHECK-LABEL: setbcr2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i32 %a, 1
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define dso_local signext i32 @setbcr3(i64 %a) {
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; CHECK-LABEL: setbcr3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpdi r3, 1
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; CHECK-NEXT: setbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i64 %a, 1
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define dso_local signext i32 @setbcr4(i16 %a) {
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; CHECK-LABEL: setbcr4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: clrlwi r3, r3, 16
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i16 %a, 1
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define signext i64 @setbcr5(i8 %a) {
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; CHECK-LABEL: setbcr5:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: clrlwi r3, r3, 24
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i8 %a, 1
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%conv = zext i1 %cmp to i64
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ret i64 %conv
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}
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define signext i64 @setbcr6(i32 %a) {
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; CHECK-LABEL: setbcr6:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i32 %a, 1
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%conv = zext i1 %cmp to i64
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ret i64 %conv
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}
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define signext i64 @setbcr7(i64 %a) {
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; CHECK-LABEL: setbcr7:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpdi r3, 1
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; CHECK-NEXT: setbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i64 %a, 1
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%conv = zext i1 %cmp to i64
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ret i64 %conv
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}
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define signext i64 @setbcr8(i16 %a) {
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; CHECK-LABEL: setbcr8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: clrlwi r3, r3, 16
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: setbcr r3, eq
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp ne i16 %a, 1
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%conv = zext i1 %cmp to i64
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ret i64 %conv
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}
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define dso_local void @setbcr9(i8 %a) {
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; CHECK-LE-LABEL: setbcr9:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: clrlwi r3, r3, 24
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; CHECK-LE-NEXT: cmpwi r3, 1
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; CHECK-LE-NEXT: setbcr r3, eq
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; CHECK-LE-NEXT: pstb r3, globalVal@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setbcr9:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: clrlwi r3, r3, 24
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; CHECK-BE-NEXT: addis r4, r2, globalVal@toc@ha
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; CHECK-BE-NEXT: cmpwi r3, 1
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; CHECK-BE-NEXT: setbcr r3, eq
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; CHECK-BE-NEXT: stb r3, globalVal@toc@l(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp ne i8 %a, 1
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%conv1 = zext i1 %cmp to i8
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store i8 %conv1, i8* @globalVal, align 1
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ret void
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}
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define dso_local void @setbcr10(i32 %a) {
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; CHECK-LE-LABEL: setbcr10:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: cmpwi r3, 1
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; CHECK-LE-NEXT: setbcr r3, eq
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; CHECK-LE-NEXT: pstw r3, globalVal2@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setbcr10:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: cmpwi r3, 1
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; CHECK-BE-NEXT: addis r4, r2, globalVal2@toc@ha
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; CHECK-BE-NEXT: setbcr r3, eq
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; CHECK-BE-NEXT: stw r3, globalVal2@toc@l(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp ne i32 %a, 1
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%conv1 = zext i1 %cmp to i32
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store i32 %conv1, i32* @globalVal2, align 4
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ret void
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}
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define dso_local void @setbcr11(i64 %a) {
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; CHECK-LE-LABEL: setbcr11:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: cmpdi r3, 1
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; CHECK-LE-NEXT: setbcr r3, eq
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; CHECK-LE-NEXT: pstd r3, globalVal3@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setbcr11:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: cmpdi r3, 1
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; CHECK-BE-NEXT: addis r4, r2, globalVal3@toc@ha
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; CHECK-BE-NEXT: setbcr r3, eq
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; CHECK-BE-NEXT: std r3, globalVal3@toc@l(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp ne i64 %a, 1
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%conv1 = zext i1 %cmp to i64
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store i64 %conv1, i64* @globalVal3, align 8
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ret void
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}
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define dso_local void @setbcr12(i16 %a) {
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; CHECK-LE-LABEL: setbcr12:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: clrlwi r3, r3, 16
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; CHECK-LE-NEXT: cmpwi r3, 1
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; CHECK-LE-NEXT: setbcr r3, eq
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; CHECK-LE-NEXT: psth r3, globalVal4@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: setbcr12:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: clrlwi r3, r3, 16
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; CHECK-BE-NEXT: addis r4, r2, globalVal4@toc@ha
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; CHECK-BE-NEXT: cmpwi r3, 1
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; CHECK-BE-NEXT: setbcr r3, eq
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; CHECK-BE-NEXT: sth r3, globalVal4@toc@l(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%cmp = icmp ne i16 %a, 1
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%conv1 = zext i1 %cmp to i16
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store i16 %conv1, i16* @globalVal4, align 2
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ret void
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}
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