llvm-for-llvmta/test/CodeGen/PowerPC/dcbf-p10.ll

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2022-04-25 10:02:23 +02:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s \
; RUN: -verify-machineinstrs -ppc-asm-full-reg-names \
; RUN: -ppc-vsr-nums-as-vr -mcpu=pwr10 | FileCheck %s
; RUN: llc -mtriple=powerpc64-unknown-linux-gnu < %s \
; RUN: -verify-machineinstrs -ppc-asm-full-reg-names \
; RUN: -ppc-vsr-nums-as-vr -mcpu=pwr10 | FileCheck %s
; Function Attrs: nounwind
define void @dcbfps_test(i8* %a) {
; CHECK-LABEL: dcbfps_test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi r3, r3, 3
; CHECK-NEXT: dcbfps 0, r3
; CHECK-NEXT: blr
entry:
%add.a = getelementptr inbounds i8, i8* %a, i64 3
tail call void @llvm.ppc.dcbfps(i8* %add.a)
ret void
}
declare void @llvm.ppc.dcbfps(i8*)
; Function Attrs: nounwind
define void @dcbstps_test(i8* %a) {
; CHECK-LABEL: dcbstps_test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi r3, r3, 3
; CHECK-NEXT: dcbstps 0, r3
; CHECK-NEXT: blr
entry:
%add.a = getelementptr inbounds i8, i8* %a, i64 3
tail call void @llvm.ppc.dcbstps(i8* %add.a)
ret void
}
declare void @llvm.ppc.dcbstps(i8*)