184 lines
6.9 KiB
LLVM
184 lines
6.9 KiB
LLVM
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;; This file tests how llc handles symbols containing invalid characters on an
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;; XCOFF platform.
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;; Since symbol name resolution is the same between 32-bit and 64-bit,
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;; tests for 64-bit mode are omitted.
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; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
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; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false < %s | \
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; RUN: FileCheck --check-prefix=ASM %s
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; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
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; RUN: -mattr=-altivec -data-sections=false -xcoff-traceback-table=false -filetype=obj -o %t.o < %s
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; RUN: llvm-objdump -D -r --symbol-description %t.o | \
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; RUN: FileCheck --check-prefix=OBJ %s
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; This is f`o
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@"f\60o" = global i32 10, align 4
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; This is f"o"
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@"f\22o\22" = common global i32 0, align 4
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; This is f=o
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@"f\3do" = internal global i32 0, align 4
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define internal i32 @f$o() {
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entry:
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%call = call i32 bitcast (i32 (...)* @"f\40o" to i32 ()*)()
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ret i32 %call
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}
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; This is f&o
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define i32 @"f\26o"() {
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entry:
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%tmp = call i32 @f$o()
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%tmp1 = load i32, i32* @"f\3do"
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%tmp2 = add i32 %tmp, %tmp1
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ret i32 %tmp2
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}
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; This is f&_o
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define i32 (...)* @"f\26_o"() {
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entry:
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ret i32 (...)* @"f\40o"
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}
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; This is f@o
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declare i32 @"f\40o"(...)
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; ASM: .lglobl _Renamed..24f_o[DS] # -- Begin function f$o
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; ASM-NEXT: .rename _Renamed..24f_o[DS],"f$o"
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; ASM-NEXT: .lglobl ._Renamed..24f_o
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; ASM-NEXT: .rename ._Renamed..24f_o,".f$o"
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; ASM-NEXT: .align 4
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; ASM-NEXT: .csect _Renamed..24f_o[DS],2
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; ASM-NEXT: .vbyte 4, ._Renamed..24f_o # @"f$o"
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; ASM-NEXT: .vbyte 4, TOC[TC0]
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; ASM-NEXT: .vbyte 4, 0
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; ASM-NEXT: .csect .text[PR],2
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; ASM-NEXT: ._Renamed..24f_o:
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; ASM: bl ._Renamed..40f_o[PR]
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; ASM-NEXT: nop
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; ASM: .globl _Renamed..26f_o[DS] # -- Begin function f&o
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; ASM-NEXT: .rename _Renamed..26f_o[DS],"f&o"
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; ASM-NEXT: .globl ._Renamed..26f_o
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; ASM-NEXT: .rename ._Renamed..26f_o,".f&o"
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; ASM-NEXT: .align 4
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; ASM-NEXT: .csect _Renamed..26f_o[DS],2
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; ASM-NEXT: .vbyte 4, ._Renamed..26f_o # @"f&o"
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; ASM-NEXT: .vbyte 4, TOC[TC0]
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; ASM-NEXT: .vbyte 4, 0
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; ASM-NEXT: .csect .text[PR],2
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; ASM-NEXT: ._Renamed..26f_o:
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; ASM: bl ._Renamed..24f_o
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; ASM: .globl _Renamed..265ff__o[DS] # -- Begin function f&_o
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; ASM-NEXT: .rename _Renamed..265ff__o[DS],"f&_o"
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; ASM-NEXT: .globl ._Renamed..265ff__o
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; ASM-NEXT: .rename ._Renamed..265ff__o,".f&_o"
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; ASM-NEXT: .align 4
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; ASM-NEXT: .csect _Renamed..265ff__o[DS],2
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; ASM-NEXT: .vbyte 4, ._Renamed..265ff__o # @"f&_o"
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; ASM-NEXT: .vbyte 4, TOC[TC0]
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; ASM-NEXT: .vbyte 4, 0
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; ASM-NEXT: .csect .text[PR],2
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; ASM-NEXT: ._Renamed..265ff__o:
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; ASM: .csect .data[RW],2
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; ASM-NEXT: .globl _Renamed..60f_o
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; ASM-NEXT: .rename _Renamed..60f_o,"f`o"
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; ASM-NEXT: .align 2
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; ASM-NEXT: _Renamed..60f_o:
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; ASM-NEXT: .vbyte 4, 10 # 0xa
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; ASM-NEXT: .comm _Renamed..2222f_o_[RW],4,2
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; ASM-NEXT: .rename _Renamed..2222f_o_[RW],"f""o"""
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; ASM-NEXT: .lcomm _Renamed..3df_o,4,_Renamed..3df_o[BS],2
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; ASM-NEXT: .rename _Renamed..3df_o[BS],"f=o"
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; ASM-NEXT: .extern ._Renamed..40f_o[PR]
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; ASM-NEXT: .rename ._Renamed..40f_o[PR],".f@o"
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; ASM-NEXT: .extern _Renamed..40f_o[DS]
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; ASM-NEXT: .rename _Renamed..40f_o[DS],"f@o"
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; ASM-NEXT: .toc
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; ASM-NEXT: L..C0:
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; ASM-NEXT: .tc _Renamed..3df_o[TC],_Renamed..3df_o[BS]
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; ASM-NEXT: .rename _Renamed..3df_o[TC],"f=o"
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; ASM-NEXT: L..C1:
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; ASM-NEXT: .tc _Renamed..40f_o[TC],_Renamed..40f_o[DS]
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; ASM-NEXT: .rename _Renamed..40f_o[TC],"f@o"
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; OBJ: Disassembly of section .text:
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000000 (idx: 6) .f$o:
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; OBJ-NEXT: 0: 7c 08 02 a6 mflr 0
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; OBJ-NEXT: 4: 90 01 00 08 stw 0, 8(1)
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; OBJ-NEXT: 8: 94 21 ff c0 stwu 1, -64(1)
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; OBJ-NEXT: c: 4b ff ff f5 bl 0x0
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; OBJ-NEXT: 0000000c: R_RBR (idx: 0) .f@o[PR]
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; OBJ-NEXT: 10: 60 00 00 00 nop
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; OBJ-NEXT: 14: 38 21 00 40 addi 1, 1, 64
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; OBJ-NEXT: 18: 80 01 00 08 lwz 0, 8(1)
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; OBJ-NEXT: 1c: 7c 08 03 a6 mtlr 0
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; OBJ-NEXT: 20: 4e 80 00 20 blr
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; OBJ-NEXT: 24: 60 00 00 00 nop
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; OBJ-NEXT: 28: 60 00 00 00 nop
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; OBJ-NEXT: 2c: 60 00 00 00 nop
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000030 (idx: 8) .f&o:
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; OBJ-NEXT: 30: 7c 08 02 a6 mflr 0
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; OBJ-NEXT: 34: 90 01 00 08 stw 0, 8(1)
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; OBJ-NEXT: 38: 94 21 ff c0 stwu 1, -64(1)
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; OBJ-NEXT: 3c: 4b ff ff c5 bl 0x0
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; OBJ-NEXT: 40: 80 82 00 00 lwz 4, 0(2)
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; OBJ-NEXT: 00000042: R_TOC (idx: 24) f=o[TC]
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; OBJ-NEXT: 44: 80 84 00 00 lwz 4, 0(4)
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; OBJ-NEXT: 48: 7c 63 22 14 add 3, 3, 4
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; OBJ-NEXT: 4c: 38 21 00 40 addi 1, 1, 64
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; OBJ-NEXT: 50: 80 01 00 08 lwz 0, 8(1)
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; OBJ-NEXT: 54: 7c 08 03 a6 mtlr 0
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; OBJ-NEXT: 58: 4e 80 00 20 blr
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; OBJ-NEXT: 5c: 60 00 00 00 nop
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000060 (idx: 10) .f&_o:
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; OBJ-NEXT: 60: 80 62 00 04 lwz 3, 4(2)
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; OBJ-NEXT: 00000062: R_TOC (idx: 26) f@o[TC]
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; OBJ-NEXT: 64: 4e 80 00 20 blr
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; OBJ-EMPTY:
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; OBJ-NEXT: Disassembly of section .data:
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000068 (idx: 14) f`o:
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; OBJ-NEXT: 68: 00 00 00 0a <unknown>
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; OBJ-EMPTY:
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; OBJ-NEXT: 0000006c (idx: 16) f$o[DS]:
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; OBJ-NEXT: 6c: 00 00 00 00 <unknown>
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; OBJ-NEXT: 0000006c: R_POS (idx: 6) .f$o
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; OBJ-NEXT: 70: 00 00 00 90 <unknown>
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; OBJ-NEXT: 00000070: R_POS (idx: 22) TOC[TC0]
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; OBJ-NEXT: 74: 00 00 00 00 <unknown>
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000078 (idx: 18) f&o[DS]:
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; OBJ-NEXT: 78: 00 00 00 30 <unknown>
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; OBJ-NEXT: 00000078: R_POS (idx: 8) .f&o
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; OBJ-NEXT: 7c: 00 00 00 90 <unknown>
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; OBJ-NEXT: 0000007c: R_POS (idx: 22) TOC[TC0]
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; OBJ-NEXT: 80: 00 00 00 00 <unknown>
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000084 (idx: 20) f&_o[DS]:
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; OBJ-NEXT: 84: 00 00 00 60 <unknown>
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; OBJ-NEXT: 00000084: R_POS (idx: 10) .f&_o
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; OBJ-NEXT: 88: 00 00 00 90 <unknown>
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; OBJ-NEXT: 00000088: R_POS (idx: 22) TOC[TC0]
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; OBJ-NEXT: 8c: 00 00 00 00 <unknown>
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000090 (idx: 24) f=o[TC]:
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; OBJ-NEXT: 90: 00 00 00 9c <unknown>
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; OBJ-NEXT: 00000090: R_POS (idx: 30) f=o[BS]
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000094 (idx: 26) f@o[TC]:
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; OBJ-NEXT: 94: 00 00 00 00 <unknown>
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; OBJ-NEXT: 00000094: R_POS (idx: 2) f@o[DS]
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; OBJ-EMPTY:
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; OBJ-NEXT: Disassembly of section .bss:
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; OBJ-EMPTY:
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; OBJ-NEXT: 00000098 (idx: 28) f"o"[RW]:
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; OBJ-NEXT: ...
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; OBJ-EMPTY:
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; OBJ-NEXT: 0000009c (idx: 30) f=o[BS]:
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; OBJ-NEXT: ...
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