133 lines
3.7 KiB
LLVM
133 lines
3.7 KiB
LLVM
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 -verify-machineinstrs | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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declare i16 @llvm.ctlz.i16(i16, i1) readnone
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declare i32 @llvm.ctlz.i32(i32, i1) readnone
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declare i64 @llvm.ctlz.i64(i64, i1) readnone
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; There should be no difference between llvm.ctlz.i32(%a, true) and
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; llvm.ctlz.i32(%a, false), as ptx's clz(0) is defined to return 0.
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; CHECK-LABEL: myctlz(
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define i32 @myctlz(i32 %a) {
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; CHECK: ld.param.
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; CHECK-NEXT: clz.b32
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; CHECK-NEXT: st.param.
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; CHECK-NEXT: ret;
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%val = call i32 @llvm.ctlz.i32(i32 %a, i1 false) readnone
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ret i32 %val
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}
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; CHECK-LABEL: myctlz_2(
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define i32 @myctlz_2(i32 %a) {
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; CHECK: ld.param.
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; CHECK-NEXT: clz.b32
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; CHECK-NEXT: st.param.
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; CHECK-NEXT: ret;
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%val = call i32 @llvm.ctlz.i32(i32 %a, i1 true) readnone
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ret i32 %val
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}
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; PTX's clz.b64 returns a 32-bit value, but LLVM's intrinsic returns a 64-bit
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; value, so here we have to zero-extend it.
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; CHECK-LABEL: myctlz64(
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define i64 @myctlz64(i64 %a) {
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; CHECK: ld.param.
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; CHECK-NEXT: clz.b64
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; CHECK-NEXT: cvt.u64.u32
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; CHECK-NEXT: st.param.
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; CHECK-NEXT: ret;
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%val = call i64 @llvm.ctlz.i64(i64 %a, i1 false) readnone
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ret i64 %val
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}
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; CHECK-LABEL: myctlz64_2(
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define i64 @myctlz64_2(i64 %a) {
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; CHECK: ld.param.
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; CHECK-NEXT: clz.b64
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; CHECK-NEXT: cvt.u64.u32
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; CHECK-NEXT: st.param.
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; CHECK-NEXT: ret;
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%val = call i64 @llvm.ctlz.i64(i64 %a, i1 true) readnone
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ret i64 %val
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}
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; Here we truncate the 64-bit value of LLVM's ctlz intrinsic to 32 bits, the
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; natural return width of ptx's clz.b64 instruction. No conversions should be
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; necessary in the PTX.
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; CHECK-LABEL: myctlz64_as_32(
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define i32 @myctlz64_as_32(i64 %a) {
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; CHECK: ld.param.
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; CHECK-NEXT: clz.b64
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; CHECK-NEXT: st.param.
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; CHECK-NEXT: ret;
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%val = call i64 @llvm.ctlz.i64(i64 %a, i1 false) readnone
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%trunc = trunc i64 %val to i32
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ret i32 %trunc
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}
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; CHECK-LABEL: myctlz64_as_32_2(
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define i32 @myctlz64_as_32_2(i64 %a) {
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; CHECK: ld.param.
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; CHECK-NEXT: clz.b64
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; CHECK-NEXT: st.param.
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; CHECK-NEXT: ret;
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%val = call i64 @llvm.ctlz.i64(i64 %a, i1 false) readnone
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%trunc = trunc i64 %val to i32
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ret i32 %trunc
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}
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; ctlz.i16 is implemented by extending the input to i32, computing the result,
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; and then truncating the result back down to i16. But the NVPTX ABI
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; zero-extends i16 return values to i32, so the final truncation doesn't appear
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; in this function.
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; CHECK-LABEL: myctlz_ret16(
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define i16 @myctlz_ret16(i16 %a) {
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; CHECK: ld.param.
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; CHECK-NEXT: cvt.u32.u16
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; CHECK-NEXT: clz.b32
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; CHECK-NEXT: sub.
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; CHECK-NEXT: st.param.
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; CHECK-NEXT: ret;
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%val = call i16 @llvm.ctlz.i16(i16 %a, i1 false) readnone
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ret i16 %val
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}
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; CHECK-LABEL: myctlz_ret16_2(
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define i16 @myctlz_ret16_2(i16 %a) {
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; CHECK: ld.param.
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; CHECK-NEXT: cvt.u32.u16
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; CHECK-NEXT: clz.b32
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; CHECK-NEXT: sub.
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; CHECK-NEXT: st.param.
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; CHECK-NEXT: ret;
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%val = call i16 @llvm.ctlz.i16(i16 %a, i1 true) readnone
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ret i16 %val
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}
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; Here we store the result of ctlz.16 into an i16 pointer, so the trunc should
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; remain.
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; CHECK-LABEL: myctlz_store16(
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define void @myctlz_store16(i16 %a, i16* %b) {
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; CHECK: ld.param.
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; CHECK-NEXT: cvt.u32.u16
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; CHECK-NEXT: clz.b32
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; CHECK-DAG: cvt.u16.u32
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; CHECK-DAG: sub.
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; CHECK: st.{{[a-z]}}16
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; CHECK: ret;
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%val = call i16 @llvm.ctlz.i16(i16 %a, i1 false) readnone
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store i16 %val, i16* %b
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ret void
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}
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; CHECK-LABEL: myctlz_store16_2(
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define void @myctlz_store16_2(i16 %a, i16* %b) {
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; CHECK: ld.param.
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; CHECK-NEXT: cvt.u32.u16
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; CHECK-NEXT: clz.b32
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; CHECK-DAG: cvt.u16.u32
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; CHECK-DAG: sub.
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; CHECK: st.{{[a-z]}}16
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; CHECK: ret;
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%val = call i16 @llvm.ctlz.i16(i16 %a, i1 false) readnone
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store i16 %val, i16* %b
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ret void
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}
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