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llvm-for-llvmta/test/CodeGen/Mips/longbranch/branch-limits-int-micromips...

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first commit
2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 -mattr=+micromips -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MMR6
# RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 -mattr=+micromips -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC
# Test the long branch expansion of various branches
--- |
define void @expand_BEQC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BNEC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BGEC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BGEUC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BGEZC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BGTZC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BLEZC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BLTC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BLTUC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BLTZC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BEQZC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 8388608", ""()
br label %tail
tail:
ret void
}
define void @expand_BNEZC_MMR6(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 8388608", ""()
br label %tail
tail:
ret void
}
...
---
name: expand_BEQC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BEQC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BNEC_MMR6 $at, $zero, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BEQC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BNEC_MMR6 $at, $zero, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BEQC_MMR6 killed renamable $at, $zero, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BNEC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BNEC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BEQC_MMR6 $at, $zero, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BNEC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BEQC_MMR6 $at, $zero, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BNEC_MMR6 killed renamable $at, $zero, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BGEC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BGEC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BLTC_MMR6 $at, $zero, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BGEC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BLTC_MMR6 $at, $zero, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BGEC_MMR6 killed renamable $at, $zero, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BGEUC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BGEUC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BLTUC_MMR6 $at, $zero, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BGEUC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BLTUC_MMR6 $at, $zero, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BGEUC_MMR6 killed renamable $at, $zero, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BGEZC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BGEZC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BLTZC_MMR6 $at, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BGEZC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BLTZC_MMR6 $at, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BGEZC_MMR6 killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BGTZC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BGTZC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BLEZC_MMR6 $at, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BGTZC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BLEZC_MMR6 $at, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BGTZC_MMR6 killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BLEZC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BLEZC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BGTZC_MMR6 $at, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BLEZC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BGTZC_MMR6 $at, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BLEZC_MMR6 killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BLTC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BLTC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BGEC_MMR6 $at, $zero, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BLTC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BGEC_MMR6 $at, $zero, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BLTC_MMR6 killed renamable $at, $zero, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BLTUC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BLTUC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BGEUC_MMR6 $at, $zero, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BLTUC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BGEUC_MMR6 $at, $zero, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BLTUC_MMR6 killed renamable $at, $zero, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BLTZC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BLTZC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BGEZC_MMR6 $at, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 131068", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BLTZC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BGEZC_MMR6 $at, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BLTZC_MMR6 killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BEQZC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BEQZC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BNEZC_MMR6 $at, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 8388608", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BEQZC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BNEZC_MMR6 $at, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 8388608", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BEQZC_MMR6 killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 8388608", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BNEZC_MMR6
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MMR6-LABEL: name: expand_BNEZC_MMR6
; MMR6: bb.0 (%ir-block.0):
; MMR6: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MMR6: renamable $at = ANDi killed renamable $a0, 1
; MMR6: BEQZC_MMR6 $at, %bb.2, implicit-def $at
; MMR6: bb.1 (%ir-block.0):
; MMR6: successors: %bb.3(0x80000000)
; MMR6: BC_MMR6 %bb.3
; MMR6: bb.2.iftrue:
; MMR6: successors: %bb.3(0x80000000)
; MMR6: INLINEASM &".space 8388608", 1
; MMR6: bb.3.tail:
; MMR6: JRC16_MM undef $ra
; PIC-LABEL: name: expand_BNEZC_MMR6
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BEQZC_MMR6 $at, %bb.3, implicit-def $at
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: BALC_MMR6 %bb.2, implicit-def $ra
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: $sp = ADDiu $sp, 8
; PIC: JIC_MMR6 $at, 0, implicit-def $at
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 8388608", 1
; PIC: bb.4.tail:
; PIC: JRC16_MM undef $ra
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BNEZC_MMR6 killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 8388608", 1
bb.2.tail:
PseudoReturn undef $ra
...