llvm-for-llvmta/test/CodeGen/Mips/GlobalISel/regbankselect/sitofp_and_uitofp.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |
define void @i32tof32() {entry: ret void}
define void @i32tof64() {entry: ret void}
define void @u32tof64() {entry: ret void}
...
---
name: i32tof32
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: i32tof32
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; FP32: [[SITOFP:%[0-9]+]]:fprb(s32) = G_SITOFP [[COPY]](s32)
; FP32: $f0 = COPY [[SITOFP]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: i32tof32
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; FP64: [[SITOFP:%[0-9]+]]:fprb(s32) = G_SITOFP [[COPY]](s32)
; FP64: $f0 = COPY [[SITOFP]](s32)
; FP64: RetRA implicit $f0
%0:_(s32) = COPY $a0
%1:_(s32) = G_SITOFP %0(s32)
$f0 = COPY %1(s32)
RetRA implicit $f0
...
---
name: i32tof64
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: i32tof64
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; FP32: [[SITOFP:%[0-9]+]]:fprb(s64) = G_SITOFP [[COPY]](s32)
; FP32: $d0 = COPY [[SITOFP]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: i32tof64
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; FP64: [[SITOFP:%[0-9]+]]:fprb(s64) = G_SITOFP [[COPY]](s32)
; FP64: $d0 = COPY [[SITOFP]](s64)
; FP64: RetRA implicit $d0
%0:_(s32) = COPY $a0
%1:_(s64) = G_SITOFP %0(s32)
$d0 = COPY %1(s64)
RetRA implicit $d0
...
---
name: u32tof64
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; FP32-LABEL: name: u32tof64
; FP32: liveins: $a0
; FP32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; FP32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1127219200
; FP32: [[MV:%[0-9]+]]:fprb(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)
; FP32: [[C1:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0x4330000000000000
; FP32: [[FSUB:%[0-9]+]]:fprb(s64) = G_FSUB [[MV]], [[C1]]
; FP32: $d0 = COPY [[FSUB]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: u32tof64
; FP64: liveins: $a0
; FP64: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; FP64: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1127219200
; FP64: [[MV:%[0-9]+]]:fprb(s64) = G_MERGE_VALUES [[COPY]](s32), [[C]](s32)
; FP64: [[C1:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0x4330000000000000
; FP64: [[FSUB:%[0-9]+]]:fprb(s64) = G_FSUB [[MV]], [[C1]]
; FP64: $d0 = COPY [[FSUB]](s64)
; FP64: RetRA implicit $d0
%0:_(s32) = COPY $a0
%2:_(s32) = G_CONSTANT i32 1127219200
%3:_(s64) = G_MERGE_VALUES %0(s32), %2(s32)
%4:_(s64) = G_FCONSTANT double 0x4330000000000000
%1:_(s64) = G_FSUB %3, %4
$d0 = COPY %1(s64)
RetRA implicit $d0
...