623 lines
20 KiB
Plaintext
623 lines
20 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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--- |
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define i1 @phi_i1(i1 %cnd, i1 %a, i1 %b) {
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entry:
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i1 [ %a, %cond.true ], [ %b, %cond.false ]
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ret i1 %cond
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}
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define i8 @phi_i8(i1 %cnd, i8 %a, i8 %b) {
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entry:
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i8 [ %a, %cond.true ], [ %b, %cond.false ]
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ret i8 %cond
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}
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define i16 @phi_i16(i1 %cnd, i16 %a, i16 %b) {
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entry:
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i16 [ %a, %cond.true ], [ %b, %cond.false ]
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ret i16 %cond
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}
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define i32 @phi_i32(i1 %cnd, i32 %a, i32 %b) {
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entry:
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i32 [ %a, %cond.true ], [ %b, %cond.false ]
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ret i32 %cond
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}
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define i64 @phi_i64(i1 %cnd, i64 %a, i64 %b) {
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entry:
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i64 [ %a, %cond.true ], [ %b, %cond.false ]
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ret i64 %cond
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}
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define void @phi_ambiguous_i64_in_fpr(i1 %cnd, i64* %i64_ptr_a, i64* %i64_ptr_b, i64* %i64_ptr_c) {
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entry:
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%0 = load i64, i64* %i64_ptr_a, align 8
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%1 = load i64, i64* %i64_ptr_b, align 8
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i64 [ %0, %cond.true ], [ %1, %cond.false ]
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store i64 %cond, i64* %i64_ptr_c, align 8
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ret void
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}
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define float @phi_float(i1 %cnd, float %a, float %b) {
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entry:
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi float [ %a, %cond.true ], [ %b, %cond.false ]
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ret float %cond
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}
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define void @phi_ambiguous_float_in_gpr(i1 %cnd, float* %f32_ptr_a, float* %f32_ptr_b, float* %f32_ptr_c) {
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entry:
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%0 = load float, float* %f32_ptr_a, align 4
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%1 = load float, float* %f32_ptr_b, align 4
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi float [ %0, %cond.true ], [ %1, %cond.false ]
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store float %cond, float* %f32_ptr_c, align 4
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ret void
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}
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define double @phi_double(double %a, double %b, i1 %cnd) {
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entry:
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br i1 %cnd, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi double [ %a, %cond.true ], [ %b, %cond.false ]
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ret double %cond
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}
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...
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---
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name: phi_i1
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alignment: 4
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tracksRegLiveness: true
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body: |
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; MIPS32-LABEL: name: phi_i1
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; MIPS32: bb.0.entry:
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; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; MIPS32: liveins: $a0, $a1, $a2
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
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; MIPS32: G_BRCOND [[AND]](s32), %bb.1
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; MIPS32: G_BR %bb.2
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; MIPS32: bb.1.cond.true:
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; MIPS32: successors: %bb.3(0x80000000)
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; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; MIPS32: G_BR %bb.3
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; MIPS32: bb.2.cond.false:
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; MIPS32: successors: %bb.3(0x80000000)
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; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
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; MIPS32: bb.3.cond.end:
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; MIPS32: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY4]](s32), %bb.1, [[COPY5]](s32), %bb.2
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; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[PHI]](s32)
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; MIPS32: $v0 = COPY [[COPY6]](s32)
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; MIPS32: RetRA implicit $v0
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bb.1.entry:
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liveins: $a0, $a1, $a2
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%3:_(s32) = COPY $a0
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%0:_(s1) = G_TRUNC %3(s32)
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%4:_(s32) = COPY $a1
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%1:_(s1) = G_TRUNC %4(s32)
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%5:_(s32) = COPY $a2
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%2:_(s1) = G_TRUNC %5(s32)
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G_BRCOND %0(s1), %bb.2
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G_BR %bb.3
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bb.2.cond.true:
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G_BR %bb.4
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bb.3.cond.false:
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bb.4.cond.end:
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%6:_(s1) = G_PHI %1(s1), %bb.2, %2(s1), %bb.3
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%7:_(s32) = G_ANYEXT %6(s1)
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$v0 = COPY %7(s32)
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RetRA implicit $v0
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...
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---
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name: phi_i8
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alignment: 4
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tracksRegLiveness: true
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body: |
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; MIPS32-LABEL: name: phi_i8
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; MIPS32: bb.0.entry:
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; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; MIPS32: liveins: $a0, $a1, $a2
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
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; MIPS32: G_BRCOND [[AND]](s32), %bb.1
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; MIPS32: G_BR %bb.2
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; MIPS32: bb.1.cond.true:
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; MIPS32: successors: %bb.3(0x80000000)
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; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; MIPS32: G_BR %bb.3
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; MIPS32: bb.2.cond.false:
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; MIPS32: successors: %bb.3(0x80000000)
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; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
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; MIPS32: bb.3.cond.end:
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; MIPS32: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY4]](s32), %bb.1, [[COPY5]](s32), %bb.2
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; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[PHI]](s32)
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; MIPS32: $v0 = COPY [[COPY6]](s32)
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; MIPS32: RetRA implicit $v0
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bb.1.entry:
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liveins: $a0, $a1, $a2
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%3:_(s32) = COPY $a0
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%0:_(s1) = G_TRUNC %3(s32)
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%4:_(s32) = COPY $a1
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%1:_(s8) = G_TRUNC %4(s32)
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%5:_(s32) = COPY $a2
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%2:_(s8) = G_TRUNC %5(s32)
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G_BRCOND %0(s1), %bb.2
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G_BR %bb.3
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bb.2.cond.true:
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G_BR %bb.4
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bb.3.cond.false:
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bb.4.cond.end:
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%6:_(s8) = G_PHI %1(s8), %bb.2, %2(s8), %bb.3
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%7:_(s32) = G_ANYEXT %6(s8)
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$v0 = COPY %7(s32)
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RetRA implicit $v0
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...
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---
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name: phi_i16
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alignment: 4
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tracksRegLiveness: true
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body: |
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; MIPS32-LABEL: name: phi_i16
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; MIPS32: bb.0.entry:
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; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; MIPS32: liveins: $a0, $a1, $a2
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
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; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
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; MIPS32: G_BRCOND [[AND]](s32), %bb.1
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; MIPS32: G_BR %bb.2
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; MIPS32: bb.1.cond.true:
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; MIPS32: successors: %bb.3(0x80000000)
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; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; MIPS32: G_BR %bb.3
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; MIPS32: bb.2.cond.false:
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; MIPS32: successors: %bb.3(0x80000000)
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; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
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; MIPS32: bb.3.cond.end:
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; MIPS32: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY4]](s32), %bb.1, [[COPY5]](s32), %bb.2
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; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[PHI]](s32)
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; MIPS32: $v0 = COPY [[COPY6]](s32)
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; MIPS32: RetRA implicit $v0
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bb.1.entry:
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liveins: $a0, $a1, $a2
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%3:_(s32) = COPY $a0
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%0:_(s1) = G_TRUNC %3(s32)
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%4:_(s32) = COPY $a1
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%1:_(s16) = G_TRUNC %4(s32)
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%5:_(s32) = COPY $a2
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%2:_(s16) = G_TRUNC %5(s32)
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G_BRCOND %0(s1), %bb.2
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G_BR %bb.3
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bb.2.cond.true:
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G_BR %bb.4
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bb.3.cond.false:
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bb.4.cond.end:
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%6:_(s16) = G_PHI %1(s16), %bb.2, %2(s16), %bb.3
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%7:_(s32) = G_ANYEXT %6(s16)
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$v0 = COPY %7(s32)
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RetRA implicit $v0
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...
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---
|
||
|
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name: phi_i32
|
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alignment: 4
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tracksRegLiveness: true
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|
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body: |
|
||
|
|
; MIPS32-LABEL: name: phi_i32
|
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|
; MIPS32: bb.0.entry:
|
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|
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; MIPS32: liveins: $a0, $a1, $a2
|
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|
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; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
|
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|
|
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
|
||
|
|
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
|
||
|
|
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||
|
|
; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||
|
|
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
|
||
|
|
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
|
||
|
|
; MIPS32: G_BR %bb.2
|
||
|
|
; MIPS32: bb.1.cond.true:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: G_BR %bb.3
|
||
|
|
; MIPS32: bb.2.cond.false:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: bb.3.cond.end:
|
||
|
|
; MIPS32: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY1]](s32), %bb.1, [[COPY2]](s32), %bb.2
|
||
|
|
; MIPS32: $v0 = COPY [[PHI]](s32)
|
||
|
|
; MIPS32: RetRA implicit $v0
|
||
|
|
bb.1.entry:
|
||
|
|
liveins: $a0, $a1, $a2
|
||
|
|
|
||
|
|
%3:_(s32) = COPY $a0
|
||
|
|
%0:_(s1) = G_TRUNC %3(s32)
|
||
|
|
%1:_(s32) = COPY $a1
|
||
|
|
%2:_(s32) = COPY $a2
|
||
|
|
G_BRCOND %0(s1), %bb.2
|
||
|
|
G_BR %bb.3
|
||
|
|
|
||
|
|
bb.2.cond.true:
|
||
|
|
G_BR %bb.4
|
||
|
|
|
||
|
|
bb.3.cond.false:
|
||
|
|
|
||
|
|
bb.4.cond.end:
|
||
|
|
%4:_(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3
|
||
|
|
$v0 = COPY %4(s32)
|
||
|
|
RetRA implicit $v0
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: phi_i64
|
||
|
|
alignment: 4
|
||
|
|
tracksRegLiveness: true
|
||
|
|
fixedStack:
|
||
|
|
- { id: 0, offset: 20, size: 4, alignment: 4, isImmutable: true }
|
||
|
|
- { id: 1, offset: 16, size: 4, alignment: 8, isImmutable: true }
|
||
|
|
body: |
|
||
|
|
; MIPS32-LABEL: name: phi_i64
|
||
|
|
; MIPS32: bb.0.entry:
|
||
|
|
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||
|
|
; MIPS32: liveins: $a0, $a2, $a3
|
||
|
|
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
|
||
|
|
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
|
||
|
|
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
|
||
|
|
; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
|
||
|
|
; MIPS32: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
|
||
|
|
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load 4 from %fixed-stack.0, align 8)
|
||
|
|
; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
|
||
|
|
; MIPS32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load 4 from %fixed-stack.1)
|
||
|
|
; MIPS32: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32)
|
||
|
|
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||
|
|
; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||
|
|
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
|
||
|
|
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
|
||
|
|
; MIPS32: G_BR %bb.2
|
||
|
|
; MIPS32: bb.1.cond.true:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: G_BR %bb.3
|
||
|
|
; MIPS32: bb.2.cond.false:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: bb.3.cond.end:
|
||
|
|
; MIPS32: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[MV]](s64), %bb.1, [[MV1]](s64), %bb.2
|
||
|
|
; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[PHI]](s64)
|
||
|
|
; MIPS32: $v0 = COPY [[UV]](s32)
|
||
|
|
; MIPS32: $v1 = COPY [[UV1]](s32)
|
||
|
|
; MIPS32: RetRA implicit $v0, implicit $v1
|
||
|
|
bb.1.entry:
|
||
|
|
liveins: $a0, $a2, $a3
|
||
|
|
|
||
|
|
%3:_(s32) = COPY $a0
|
||
|
|
%0:_(s1) = G_TRUNC %3(s32)
|
||
|
|
%4:_(s32) = COPY $a2
|
||
|
|
%5:_(s32) = COPY $a3
|
||
|
|
%1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
|
||
|
|
%8:_(p0) = G_FRAME_INDEX %fixed-stack.1
|
||
|
|
%6:_(s32) = G_LOAD %8(p0) :: (load 4 from %fixed-stack.1, align 8)
|
||
|
|
%9:_(p0) = G_FRAME_INDEX %fixed-stack.0
|
||
|
|
%7:_(s32) = G_LOAD %9(p0) :: (load 4 from %fixed-stack.0)
|
||
|
|
%2:_(s64) = G_MERGE_VALUES %6(s32), %7(s32)
|
||
|
|
G_BRCOND %0(s1), %bb.2
|
||
|
|
G_BR %bb.3
|
||
|
|
|
||
|
|
bb.2.cond.true:
|
||
|
|
G_BR %bb.4
|
||
|
|
|
||
|
|
bb.3.cond.false:
|
||
|
|
|
||
|
|
bb.4.cond.end:
|
||
|
|
%10:_(s64) = G_PHI %1(s64), %bb.2, %2(s64), %bb.3
|
||
|
|
%11:_(s32), %12:_(s32) = G_UNMERGE_VALUES %10(s64)
|
||
|
|
$v0 = COPY %11(s32)
|
||
|
|
$v1 = COPY %12(s32)
|
||
|
|
RetRA implicit $v0, implicit $v1
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: phi_ambiguous_i64_in_fpr
|
||
|
|
alignment: 4
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
; MIPS32-LABEL: name: phi_ambiguous_i64_in_fpr
|
||
|
|
; MIPS32: bb.0.entry:
|
||
|
|
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||
|
|
; MIPS32: liveins: $a0, $a1, $a2, $a3
|
||
|
|
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
|
||
|
|
; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
|
||
|
|
; MIPS32: [[COPY2:%[0-9]+]]:_(p0) = COPY $a2
|
||
|
|
; MIPS32: [[COPY3:%[0-9]+]]:_(p0) = COPY $a3
|
||
|
|
; MIPS32: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY1]](p0) :: (load 8 from %ir.i64_ptr_a)
|
||
|
|
; MIPS32: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[COPY2]](p0) :: (load 8 from %ir.i64_ptr_b)
|
||
|
|
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||
|
|
; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||
|
|
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
|
||
|
|
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
|
||
|
|
; MIPS32: G_BR %bb.2
|
||
|
|
; MIPS32: bb.1.cond.true:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: G_BR %bb.3
|
||
|
|
; MIPS32: bb.2.cond.false:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: bb.3.cond.end:
|
||
|
|
; MIPS32: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[LOAD]](s64), %bb.1, [[LOAD1]](s64), %bb.2
|
||
|
|
; MIPS32: G_STORE [[PHI]](s64), [[COPY3]](p0) :: (store 8 into %ir.i64_ptr_c)
|
||
|
|
; MIPS32: RetRA
|
||
|
|
bb.1.entry:
|
||
|
|
liveins: $a0, $a1, $a2, $a3
|
||
|
|
|
||
|
|
%4:_(s32) = COPY $a0
|
||
|
|
%0:_(s1) = G_TRUNC %4(s32)
|
||
|
|
%1:_(p0) = COPY $a1
|
||
|
|
%2:_(p0) = COPY $a2
|
||
|
|
%3:_(p0) = COPY $a3
|
||
|
|
%5:_(s64) = G_LOAD %1(p0) :: (load 8 from %ir.i64_ptr_a)
|
||
|
|
%6:_(s64) = G_LOAD %2(p0) :: (load 8 from %ir.i64_ptr_b)
|
||
|
|
G_BRCOND %0(s1), %bb.2
|
||
|
|
G_BR %bb.3
|
||
|
|
|
||
|
|
bb.2.cond.true:
|
||
|
|
G_BR %bb.4
|
||
|
|
|
||
|
|
bb.3.cond.false:
|
||
|
|
|
||
|
|
bb.4.cond.end:
|
||
|
|
%7:_(s64) = G_PHI %5(s64), %bb.2, %6(s64), %bb.3
|
||
|
|
G_STORE %7(s64), %3(p0) :: (store 8 into %ir.i64_ptr_c)
|
||
|
|
RetRA
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: phi_float
|
||
|
|
alignment: 4
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
; MIPS32-LABEL: name: phi_float
|
||
|
|
; MIPS32: bb.0.entry:
|
||
|
|
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||
|
|
; MIPS32: liveins: $a0, $a1, $a2
|
||
|
|
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
|
||
|
|
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
|
||
|
|
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2
|
||
|
|
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||
|
|
; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||
|
|
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
|
||
|
|
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
|
||
|
|
; MIPS32: G_BR %bb.2
|
||
|
|
; MIPS32: bb.1.cond.true:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: G_BR %bb.3
|
||
|
|
; MIPS32: bb.2.cond.false:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: bb.3.cond.end:
|
||
|
|
; MIPS32: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY1]](s32), %bb.1, [[COPY2]](s32), %bb.2
|
||
|
|
; MIPS32: $f0 = COPY [[PHI]](s32)
|
||
|
|
; MIPS32: RetRA implicit $f0
|
||
|
|
bb.1.entry:
|
||
|
|
liveins: $a0, $a1, $a2
|
||
|
|
|
||
|
|
%3:_(s32) = COPY $a0
|
||
|
|
%0:_(s1) = G_TRUNC %3(s32)
|
||
|
|
%1:_(s32) = COPY $a1
|
||
|
|
%2:_(s32) = COPY $a2
|
||
|
|
G_BRCOND %0(s1), %bb.2
|
||
|
|
G_BR %bb.3
|
||
|
|
|
||
|
|
bb.2.cond.true:
|
||
|
|
G_BR %bb.4
|
||
|
|
|
||
|
|
bb.3.cond.false:
|
||
|
|
|
||
|
|
bb.4.cond.end:
|
||
|
|
%4:_(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3
|
||
|
|
$f0 = COPY %4(s32)
|
||
|
|
RetRA implicit $f0
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: phi_ambiguous_float_in_gpr
|
||
|
|
alignment: 4
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
; MIPS32-LABEL: name: phi_ambiguous_float_in_gpr
|
||
|
|
; MIPS32: bb.0.entry:
|
||
|
|
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||
|
|
; MIPS32: liveins: $a0, $a1, $a2, $a3
|
||
|
|
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
|
||
|
|
; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
|
||
|
|
; MIPS32: [[COPY2:%[0-9]+]]:_(p0) = COPY $a2
|
||
|
|
; MIPS32: [[COPY3:%[0-9]+]]:_(p0) = COPY $a3
|
||
|
|
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load 4 from %ir.f32_ptr_a)
|
||
|
|
; MIPS32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[COPY2]](p0) :: (load 4 from %ir.f32_ptr_b)
|
||
|
|
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||
|
|
; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
|
||
|
|
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
|
||
|
|
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
|
||
|
|
; MIPS32: G_BR %bb.2
|
||
|
|
; MIPS32: bb.1.cond.true:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: G_BR %bb.3
|
||
|
|
; MIPS32: bb.2.cond.false:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: bb.3.cond.end:
|
||
|
|
; MIPS32: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[LOAD]](s32), %bb.1, [[LOAD1]](s32), %bb.2
|
||
|
|
; MIPS32: G_STORE [[PHI]](s32), [[COPY3]](p0) :: (store 4 into %ir.f32_ptr_c)
|
||
|
|
; MIPS32: RetRA
|
||
|
|
bb.1.entry:
|
||
|
|
liveins: $a0, $a1, $a2, $a3
|
||
|
|
|
||
|
|
%4:_(s32) = COPY $a0
|
||
|
|
%0:_(s1) = G_TRUNC %4(s32)
|
||
|
|
%1:_(p0) = COPY $a1
|
||
|
|
%2:_(p0) = COPY $a2
|
||
|
|
%3:_(p0) = COPY $a3
|
||
|
|
%5:_(s32) = G_LOAD %1(p0) :: (load 4 from %ir.f32_ptr_a)
|
||
|
|
%6:_(s32) = G_LOAD %2(p0) :: (load 4 from %ir.f32_ptr_b)
|
||
|
|
G_BRCOND %0(s1), %bb.2
|
||
|
|
G_BR %bb.3
|
||
|
|
|
||
|
|
bb.2.cond.true:
|
||
|
|
G_BR %bb.4
|
||
|
|
|
||
|
|
bb.3.cond.false:
|
||
|
|
|
||
|
|
bb.4.cond.end:
|
||
|
|
%7:_(s32) = G_PHI %5(s32), %bb.2, %6(s32), %bb.3
|
||
|
|
G_STORE %7(s32), %3(p0) :: (store 4 into %ir.f32_ptr_c)
|
||
|
|
RetRA
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: phi_double
|
||
|
|
alignment: 4
|
||
|
|
tracksRegLiveness: true
|
||
|
|
fixedStack:
|
||
|
|
- { id: 0, offset: 16, size: 4, alignment: 8, isImmutable: true }
|
||
|
|
body: |
|
||
|
|
; MIPS32-LABEL: name: phi_double
|
||
|
|
; MIPS32: bb.0.entry:
|
||
|
|
; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||
|
|
; MIPS32: liveins: $d6, $d7
|
||
|
|
; MIPS32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
|
||
|
|
; MIPS32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d7
|
||
|
|
; MIPS32: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
|
||
|
|
; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load 4 from %fixed-stack.0, align 8)
|
||
|
|
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||
|
|
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32)
|
||
|
|
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
|
||
|
|
; MIPS32: G_BRCOND [[AND]](s32), %bb.1
|
||
|
|
; MIPS32: G_BR %bb.2
|
||
|
|
; MIPS32: bb.1.cond.true:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: G_BR %bb.3
|
||
|
|
; MIPS32: bb.2.cond.false:
|
||
|
|
; MIPS32: successors: %bb.3(0x80000000)
|
||
|
|
; MIPS32: bb.3.cond.end:
|
||
|
|
; MIPS32: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY]](s64), %bb.1, [[COPY1]](s64), %bb.2
|
||
|
|
; MIPS32: $d0 = COPY [[PHI]](s64)
|
||
|
|
; MIPS32: RetRA implicit $d0
|
||
|
|
bb.1.entry:
|
||
|
|
liveins: $d6, $d7
|
||
|
|
|
||
|
|
%0:_(s64) = COPY $d6
|
||
|
|
%1:_(s64) = COPY $d7
|
||
|
|
%4:_(p0) = G_FRAME_INDEX %fixed-stack.0
|
||
|
|
%3:_(s32) = G_LOAD %4(p0) :: (load 4 from %fixed-stack.0, align 8)
|
||
|
|
%2:_(s1) = G_TRUNC %3(s32)
|
||
|
|
G_BRCOND %2(s1), %bb.2
|
||
|
|
G_BR %bb.3
|
||
|
|
|
||
|
|
bb.2.cond.true:
|
||
|
|
G_BR %bb.4
|
||
|
|
|
||
|
|
bb.3.cond.false:
|
||
|
|
|
||
|
|
bb.4.cond.end:
|
||
|
|
%5:_(s64) = G_PHI %0(s64), %bb.2, %1(s64), %bb.3
|
||
|
|
$d0 = COPY %5(s64)
|
||
|
|
RetRA implicit $d0
|
||
|
|
|
||
|
|
...
|