llvm-for-llvmta/test/CodeGen/Mips/GlobalISel/instruction-select/mul.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
define void @mul_i32(i32 %x, i32 %y) {entry: ret void}
define void @umul_with_overflow(i32 %lhs, i32 %rhs, i32* %pmul, i1* %pcarry_flag) { ret void }
...
---
name: mul_i32
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: mul_i32
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
; MIPS32: [[MUL:%[0-9]+]]:gpr32 = MUL [[COPY]], [[COPY1]], implicit-def dead $hi0, implicit-def dead $lo0
; MIPS32: $v0 = COPY [[MUL]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = COPY $a0
%1:gprb(s32) = COPY $a1
%2:gprb(s32) = G_MUL %0, %1
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: umul_with_overflow
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1 (%ir-block.0):
liveins: $a0, $a1, $a2, $a3
; MIPS32-LABEL: name: umul_with_overflow
; MIPS32: liveins: $a0, $a1, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
; MIPS32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
; MIPS32: [[COPY3:%[0-9]+]]:gpr32 = COPY $a3
; MIPS32: [[MUL:%[0-9]+]]:gpr32 = MUL [[COPY]], [[COPY1]], implicit-def dead $hi0, implicit-def dead $lo0
; MIPS32: [[PseudoMULTu:%[0-9]+]]:acc64 = PseudoMULTu [[COPY]], [[COPY1]]
; MIPS32: [[PseudoMFHI:%[0-9]+]]:gpr32 = PseudoMFHI [[PseudoMULTu]]
; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu $zero, [[PseudoMFHI]]
; MIPS32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[SLTu]], 1
; MIPS32: SB [[ANDi]], [[COPY3]], 0 :: (store 1 into %ir.pcarry_flag)
; MIPS32: SW [[MUL]], [[COPY2]], 0 :: (store 4 into %ir.pmul)
; MIPS32: RetRA
%0:gprb(s32) = COPY $a0
%1:gprb(s32) = COPY $a1
%2:gprb(p0) = COPY $a2
%3:gprb(p0) = COPY $a3
%4:gprb(s32) = G_MUL %0, %1
%7:gprb(s32) = G_UMULH %0, %1
%8:gprb(s32) = G_CONSTANT i32 0
%9:gprb(s32) = G_ICMP intpred(ne), %7(s32), %8
%10:gprb(s32) = G_CONSTANT i32 1
%11:gprb(s32) = COPY %9(s32)
%6:gprb(s32) = G_AND %11, %10
G_STORE %6(s32), %3(p0) :: (store 1 into %ir.pcarry_flag)
G_STORE %4(s32), %2(p0) :: (store 4 into %ir.pmul)
RetRA
...