llvm-for-llvmta/test/CodeGen/Mips/GlobalISel/instruction-select/constants.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
define void @_0xABCD0000() {entry: ret void}
define void @_0x00008000() {entry: ret void}
define void @_0xFFFFFFF6() {entry: ret void}
define void @_0x0A0B0C0D() {entry: ret void}
...
---
name: _0xABCD0000
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: _0xABCD0000
; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi 43981
; MIPS32: $v0 = COPY [[LUi]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = G_CONSTANT i32 -1412628480
$v0 = COPY %0(s32)
RetRA implicit $v0
...
---
name: _0x00008000
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: _0x00008000
; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 32768
; MIPS32: $v0 = COPY [[ORi]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = G_CONSTANT i32 32768
$v0 = COPY %0(s32)
RetRA implicit $v0
...
---
name: _0xFFFFFFF6
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: _0xFFFFFFF6
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 65526
; MIPS32: $v0 = COPY [[ADDiu]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = G_CONSTANT i32 -10
$v0 = COPY %0(s32)
RetRA implicit $v0
...
---
name: _0x0A0B0C0D
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: _0x0A0B0C0D
; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi 2571
; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 3085
; MIPS32: $v0 = COPY [[ORi]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = G_CONSTANT i32 168496141
$v0 = COPY %0(s32)
RetRA implicit $v0
...