23 lines
692 B
LLVM
23 lines
692 B
LLVM
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; Make sure we generate 3 aligned stores.
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; CHECK: vmem({{.*}}) =
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; CHECK: vmem({{.*}}) =
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; CHECK: vmem({{.*}}) =
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; CHECK-NOT: vmem
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define void @f0(i16* %a0, i32 %a11, <64 x i16> %a22, <64 x i16> %a3) #0 {
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b0:
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%v0 = add i32 %a11, 64
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%v1 = getelementptr i16, i16* %a0, i32 %v0
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%v2 = bitcast i16* %v1 to <64 x i16>*
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store <64 x i16> %a22, <64 x i16>* %v2, align 2
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%v33 = add i32 %a11, 128
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%v44 = getelementptr i16, i16* %a0, i32 %v33
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%v5 = bitcast i16* %v44 to <64 x i16>*
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store <64 x i16> %a3, <64 x i16>* %v5, align 2
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv66" "target-features"="+hvx,+hvx-length128b" }
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