17 lines
581 B
LLVM
17 lines
581 B
LLVM
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; RUN: llc -march=hexagon -hexagon-hvx-widen=16 < %s | FileCheck %s
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; CHECK-LABEL: f0:
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; CHECK: q[[Q0:[0-3]]] = vsetq(r{{[0-9]+}})
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; CHECK: if (q[[Q0]]) vmem({{.*}}) = v
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define void @f0(<32 x i8>* %a0) #0 {
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%v0 = load <32 x i8>, <32 x i8>* %a0, align 128
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%v1 = insertelement <32 x i8> undef, i8 1, i32 0
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%v2 = shufflevector <32 x i8> %v1, <32 x i8> undef, <32 x i32> zeroinitializer
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%v3 = add <32 x i8> %v0, %v2
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store <32 x i8> %v3, <32 x i8>* %a0, align 128
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv65" "target-features"="+hvx,+hvx-length128b" }
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