294 lines
7.6 KiB
LLVM
294 lines
7.6 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s --check-prefix=CHECK-ARM
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; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - \
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; RUN: | FileCheck %s --check-prefix=CHECK-THUMB2
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;; Check how immediates are handled in add/sub.
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define i32 @sub0(i32 %0) {
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; CHECK-ARM-LABEL: sub0:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: sub r0, r0, #23
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; CHECK-ARM: mov pc, lr
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;
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; CHECK-THUMB2-LABEL: sub0:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: subs r0, #23
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; CHECK-THUMB2: bx lr
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%2 = sub i32 %0, 23
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ret i32 %2
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}
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define i32 @sub1(i32 %0) {
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; CHECK-ARM-LABEL: sub1:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: ldr r1, .LCPI1_0
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; CHECK-ARM: add r0, r0, r1
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; CHECK-ARM: mov pc, lr
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; CHECK-ARM: .p2align 2
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; CHECK-ARM: @ %bb.1:
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; CHECK-ARM: .LCPI1_0:
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; CHECK-ARM: .long 4294836225 @ 0xfffe0001
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;
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; CHECK-THUMB2-LABEL: sub1:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2 movs r1, #1
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; CHECK-THUMB2 movt r1, #65534
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; CHECK-THUMB2 add r0, r1
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; CHECK-THUMB2 bx lr
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%2 = sub i32 %0, 131071
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ret i32 %2
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}
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define i32 @sub2(i32 %0) {
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; CHECK-ARM-LABEL: sub2:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: sub r0, r0, #35
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; CHECK-ARM: sub r0, r0, #8960
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; CHECK-ARM: mov pc, lr
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;
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; CHECK-THUMB2-LABEL: sub2:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: movw r1, #8995
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; CHECK-THUMB2: subs r0, r0, r1
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; CHECK-THUMB2: bx lr
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%2 = sub i32 %0, 8995
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ret i32 %2
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}
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define i32 @sub3(i32 %0) {
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; CHECK-ARM-LABEL: sub3:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: ldr r1, .LCPI3_0
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; CHECK-ARM: add r0, r0, r1
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; CHECK-ARM: mov pc, lr
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; CHECK-ARM: .p2align 2
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; CHECK-ARM: @ %bb.1:
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; CHECK-ARM: .LCPI3_0:
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; CHECK-ARM: .long 4292870571 @ 0xffe001ab
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;
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; CHECK-THUMB2-LABEL: sub3:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: movw r1, #427
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; CHECK-THUMB2: movt r1, #65504
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; CHECK-THUMB2: add r0, r1
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; CHECK-THUMB2: bx lr
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%2 = sub i32 %0, 2096725
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ret i32 %2
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}
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define i32 @sub4(i32 %0) {
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; CHECK-ARM-LABEL: sub4:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: ldr r1, .LCPI4_0
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; CHECK-ARM: dd r0, r0, r1
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; CHECK-ARM: mov pc, lr
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; CHECK-ARM: .p2align 2
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; CHECK-ARM: @ %bb.1:
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; CHECK-ARM: .LCPI4_0:
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; CHECK-ARM: .long 4286505147 @ 0xff7ee0bb
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;
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; CHECK-THUMB2-LABEL: sub4:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2 movw r1, #57531
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; CHECK-THUMB2 movt r1, #65406
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; CHECK-THUMB2: add r0, r1
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; CHECK-THUMB2: bx lr
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%2 = sub i32 %0, 8462149
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ret i32 %2
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}
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define i32 @add0(i32 %0) {
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; CHECK-ARM-LABEL: add0:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: add r0, r0, #23
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; CHECK-ARM: mov pc, lr
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;
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; CHECK-THUMB2-LABEL: add0:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: adds r0, #23
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; CHECK-THUMB2: bx lr
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%2 = add i32 %0, 23
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ret i32 %2
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}
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define i32 @add1(i32 %0) {
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; CHECK-ARM-LABEL: add1:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM ldr r1, .LCPI4_0
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; CHECK-ARM add r0, r0, r1
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; CHECK-ARM mov pc, lr
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; CHECK-ARM .p2align 2
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; CHECK-ARM @ %bb.1:
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; CHECK-ARM .LCPI4_0:
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; CHECK-ARM .long 131071 @ 0x1ffff
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;
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; CHECK-THUMB2-LABEL: add1:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: movw r1, #65535
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; CHECK-THUMB2: movt r1, #1
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; CHECK-THUMB2: add r0, r1
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; CHECK-THUMB2: bx lr
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%2 = add i32 %0, 131071
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ret i32 %2
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}
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define i32 @add2(i32 %0) {
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; CHECK-ARM-LABEL: add2:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: add r0, r0, #8960
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; CHECK-ARM: add r0, r0, #2293760
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; CHECK-ARM: mov pc, lr
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;
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; CHECK-THUMB2-LABEL: add2:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: add.w r0, r0, #2293760
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; CHECK-THUMB2: add.w r0, r0, #8960
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; CHECK-THUMB2: bx lr
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%2 = add i32 %0, 2302720
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ret i32 %2
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}
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define i32 @add3(i32 %0) {
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; CHECK-ARM-LABEL: add3:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: ldr r1, .LCPI8_0
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; CHECK-ARM: add r0, r0, r1
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; CHECK-ARM: mov pc, lr
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; CHECK-ARM: .p2align 2
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; CHECK-ARM: @ %bb.1:
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; CHECK-ARM: .LCPI8_0:
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; CHECK-ARM: .long 2096725 @ 0x1ffe55
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;
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; CHECK-THUMB2-LABEL: add3:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: movw r1, #65109
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; CHECK-THUMB2: movt r1, #31
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; CHECK-THUMB2: add r0, r1
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; CHECK-THUMB2: bx lr
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%2 = add i32 %0, 2096725
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ret i32 %2
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}
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define i32 @add4(i32 %0) {
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; CHECK-ARM-LABEL: add4:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: ldr r1, .LCPI9_0
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; CHECK-ARM: add r0, r0, r1
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; CHECK-ARM: mov pc, lr
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; CHECK-ARM: .p2align 2
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; CHECK-ARM: @ %bb.1:
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; CHECK-ARM: .LCPI9_0:
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; CHECK-ARM: .long 8462149 @ 0x811f45
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;
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; CHECK-THUMB2-LABEL: add4:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: movw r1, #8005
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; CHECK-THUMB2: movt r1, #129
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; CHECK-THUMB2: add r0, r1
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; CHECK-THUMB2: bx lr
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%2 = add i32 %0, 8462149
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ret i32 %2
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}
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define i32 @orr0(i32 %0) {
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; CHECK-ARM-LABEL: orr0:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: orr r0, r0, #8960
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; CHECK-ARM: orr r0, r0, #2293760
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; CHECK-ARM: mov pc, lr
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;
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; CHECK-THUMB2-LABEL: orr0:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: orr r0, r0, #2293760
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; CHECK-THUMB2: orr r0, r0, #8960
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; CHECK-THUMB2: bx lr
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%2 = or i32 %0, 2302720
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ret i32 %2
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}
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define i32 @orr1(i32 %0) {
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; CHECK-ARM-LABEL: orr1:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: orr r0, r0, #23
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; CHECK-ARM: mov pc, lr
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;
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; CHECK-THUMB2-LABEL: orr1:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: orr r0, r0, #23
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; CHECK-THUMB2: bx lr
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%2 = or i32 %0, 23
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ret i32 %2
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}
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define i32 @orr2(i32 %0) {
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; CHECK-ARM-LABEL: orr2:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: ldr r1, .LCPI12_0
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; CHECK-ARM: orr r0, r0, r1
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; CHECK-ARM: mov pc, lr
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; CHECK-ARM: .p2align 2
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; CHECK-ARM: @ %bb.1:
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; CHECK-ARM: .LCPI12_0:
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; CHECK-ARM: .long 131071 @ 0x1ffff
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;
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; CHECK-THUMB2-LABEL: orr2:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2 movs r1, #1
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; CHECK-THUMB2 movt r1, #65534
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; CHECK-THUMB2 orr r0, r1
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; CHECK-THUMB2 bx lr
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%2 = or i32 %0, 131071
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ret i32 %2
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}
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define i32 @eor0(i32 %0) {
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; CHECK-ARM-LABEL: eor0:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: eor r0, r0, #8960
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; CHECK-ARM: eor r0, r0, #2293760
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; CHECK-ARM: mov pc, lr
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;
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; CHECK-THUMB2-LABEL: eor0:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: eor r0, r0, #2293760
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; CHECK-THUMB2: eor r0, r0, #8960
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; CHECK-THUMB2: bx lr
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%2 = xor i32 %0, 2302720
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ret i32 %2
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}
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define i32 @eor1(i32 %0) {
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; CHECK-ARM-LABEL: eor1:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: eor r0, r0, #23
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; CHECK-ARM: mov pc, lr
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;
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; CHECK-THUMB2-LABEL: eor1:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2: eor r0, r0, #23
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; CHECK-THUMB2: bx lr
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%2 = xor i32 %0, 23
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ret i32 %2
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}
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define i32 @eor2(i32 %0) {
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; CHECK-ARM-LABEL: eor2:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM: ldr r1, .LCPI15_0
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; CHECK-ARM: eor r0, r0, r1
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; CHECK-ARM: mov pc, lr
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; CHECK-ARM: .p2align 2
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; CHECK-ARM: @ %bb.1:
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; CHECK-ARM: .LCPI15_0:
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; CHECK-ARM: .long 131071 @ 0x1ffff
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;
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; CHECK-THUMB2-LABEL: eor2:
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; CHECK-THUMB2: @ %bb.0:
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; CHECK-THUMB2 movs r1, #1
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; CHECK-THUMB2 movt r1, #65534
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; CHECK-THUMB2 eor r0, r1
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; CHECK-THUMB2 bx lr
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%2 = xor i32 %0, 131071
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ret i32 %2
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}
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