94 lines
3.8 KiB
LLVM
94 lines
3.8 KiB
LLVM
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; RUN: llc -mtriple armv7a-none-eabi -mattr=-neon < %s -verify-machineinstrs -o - | FileCheck %s
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; Thumb1 (thumbv6m) is tested in tests/Thumb
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@a = external global i32*
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@b = external global i32*
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; Function Attrs: nounwind
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define void @foo24() #0 {
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entry:
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; CHECK-LABEL: foo24:
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; We use '[rl0-9]*' to allow 'r0'..'r12', 'lr'
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; CHECK: movt [[LB:[rl0-9]+]], :upper16:b
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; CHECK: movt [[SB:[rl0-9]+]], :upper16:a
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; CHECK: add [[NLB:[rl0-9]+]], [[LB]], #4
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; CHECK: add [[NSB:[rl0-9]+]], [[SB]], #4
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; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R5:[rl0-9]+]], [[R6:[rl0-9]+]]}
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; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]], [[R6]]}
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%0 = load i32*, i32** @a, align 4
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%arrayidx = getelementptr inbounds i32, i32* %0, i32 1
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%1 = bitcast i32* %arrayidx to i8*
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%2 = load i32*, i32** @b, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
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%3 = bitcast i32* %arrayidx1 to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %3, i32 24, i1 false)
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ret void
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}
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define void @foo28() #0 {
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entry:
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; CHECK-LABEL: foo28:
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; CHECK: movt [[LB:[rl0-9]+]], :upper16:b
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; CHECK: movt [[SB:[rl0-9]+]], :upper16:a
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; CHECK: add [[NLB:[rl0-9]+]], [[LB]], #4
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; CHECK: add [[NSB:[rl0-9]+]], [[SB]], #4
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; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]]}
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; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]]}
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; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
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; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
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%0 = load i32*, i32** @a, align 4
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%arrayidx = getelementptr inbounds i32, i32* %0, i32 1
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%1 = bitcast i32* %arrayidx to i8*
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%2 = load i32*, i32** @b, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
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%3 = bitcast i32* %arrayidx1 to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %3, i32 28, i1 false)
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ret void
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}
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define void @foo32() #0 {
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entry:
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; CHECK-LABEL: foo32:
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; CHECK: movt [[LB:[rl0-9]+]], :upper16:b
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; CHECK: movt [[SB:[rl0-9]+]], :upper16:a
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; CHECK: add [[NLB:[rl0-9]+]], [[LB]], #4
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; CHECK: add [[NSB:[rl0-9]+]], [[SB]], #4
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; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
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; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
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; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
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; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
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%0 = load i32*, i32** @a, align 4
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%arrayidx = getelementptr inbounds i32, i32* %0, i32 1
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%1 = bitcast i32* %arrayidx to i8*
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%2 = load i32*, i32** @b, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
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%3 = bitcast i32* %arrayidx1 to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %3, i32 32, i1 false)
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ret void
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}
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define void @foo36() #0 {
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entry:
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; CHECK-LABEL: foo36:
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; CHECK: movt [[LB:[rl0-9]+]], :upper16:b
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; CHECK: movt [[SB:[rl0-9]+]], :upper16:a
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; CHECK: add [[NLB:[rl0-9]+]], [[LB]], #4
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; CHECK: add [[NSB:[rl0-9]+]], [[SB]], #4
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; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
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; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
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; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R5:[rl0-9]+]]}
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; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]]}
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%0 = load i32*, i32** @a, align 4
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%arrayidx = getelementptr inbounds i32, i32* %0, i32 1
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%1 = bitcast i32* %arrayidx to i8*
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%2 = load i32*, i32** @b, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
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%3 = bitcast i32* %arrayidx1 to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %3, i32 36, i1 false)
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ret void
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}
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; Function Attrs: nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #1
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