28 lines
906 B
LLVM
28 lines
906 B
LLVM
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; RUN: llc -O0 -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
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; RUN: llc -O0 -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s
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; RUN: llc -O0 -mtriple thumbv7-windows-mingw32 -filetype asm -o - %s | FileCheck %s
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declare arm_aapcs_vfpcc i32 @num_entries()
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define arm_aapcs_vfpcc void @test___builtin_alloca() {
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entry:
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%array = alloca i8*, align 4
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%call = call arm_aapcs_vfpcc i32 @num_entries()
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%mul = mul i32 4, %call
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%0 = alloca i8, i32 %mul
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store i8* %0, i8** %array, align 4
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ret void
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}
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; CHECK: bl num_entries
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; Any register is actually valid here, but turns out we use lr,
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; because we do not have the kill flag on R0.
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; CHECK: mov [[R0:r[0-9]+]], r0
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; CHECK: movs [[R1:r[0-9]+]], #7
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; CHECK: add.w [[R2:r[0-9]+]], [[R1]], [[R0]], lsl #2
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; CHECK: bic [[R2]], [[R2]], #4
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; CHECK: lsrs r4, [[R2]], #2
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; CHECK: bl __chkstk
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; CHECK: sub.w sp, sp, r4
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