269 lines
8.6 KiB
LLVM
269 lines
8.6 KiB
LLVM
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; RUN: opt -S -mtriple=amdgcn-- -amdgpu-codegenprepare -amdgpu-codegenprepare-widen-constant-loads < %s | FileCheck -check-prefix=OPT %s
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declare i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr() #0
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; OPT-LABEL: @constant_load_i1
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; OPT: load i1
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; OPT-NEXT: store i1
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define amdgpu_kernel void @constant_load_i1(i1 addrspace(1)* %out, i1 addrspace(4)* %in) #0 {
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%val = load i1, i1 addrspace(4)* %in
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store i1 %val, i1 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_i1_align2
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; OPT: load i1
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_i1_align2(i1 addrspace(1)* %out, i1 addrspace(4)* %in) #0 {
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%val = load i1, i1 addrspace(4)* %in, align 2
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store i1 %val, i1 addrspace(1)* %out, align 2
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ret void
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}
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; OPT-LABEL: @constant_load_i1_align4
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; OPT: bitcast
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; OPT-NEXT: load i32
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; OPT-NEXT: trunc
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_i1_align4(i1 addrspace(1)* %out, i1 addrspace(4)* %in) #0 {
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%val = load i1, i1 addrspace(4)* %in, align 4
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store i1 %val, i1 addrspace(1)* %out, align 4
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ret void
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}
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; OPT-LABEL: @constant_load_i8
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; OPT: load i8
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_i8(i8 addrspace(1)* %out, i8 addrspace(4)* %in) #0 {
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%val = load i8, i8 addrspace(4)* %in
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store i8 %val, i8 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_i8_align2
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; OPT: load i8
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_i8_align2(i8 addrspace(1)* %out, i8 addrspace(4)* %in) #0 {
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%val = load i8, i8 addrspace(4)* %in, align 2
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store i8 %val, i8 addrspace(1)* %out, align 2
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ret void
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}
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; OPT-LABEL: @constant_load_i8align4
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; OPT: bitcast
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; OPT-NEXT: load i32
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; OPT-NEXT: trunc
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_i8align4(i8 addrspace(1)* %out, i8 addrspace(4)* %in) #0 {
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%val = load i8, i8 addrspace(4)* %in, align 4
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store i8 %val, i8 addrspace(1)* %out, align 4
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ret void
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}
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; OPT-LABEL: @constant_load_v2i8
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; OPT: load <2 x i8>
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_v2i8(<2 x i8> addrspace(1)* %out, <2 x i8> addrspace(4)* %in) #0 {
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%ld = load <2 x i8>, <2 x i8> addrspace(4)* %in
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store <2 x i8> %ld, <2 x i8> addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_v2i8_align4
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; OPT: bitcast
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; OPT-NEXT: load i32
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; OPT-NEXT: trunc
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; OPT-NEXT: bitcast
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_v2i8_align4(<2 x i8> addrspace(1)* %out, <2 x i8> addrspace(4)* %in) #0 {
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%ld = load <2 x i8>, <2 x i8> addrspace(4)* %in, align 4
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store <2 x i8> %ld, <2 x i8> addrspace(1)* %out, align 4
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ret void
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}
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; OPT-LABEL: @constant_load_v3i8
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; OPT: bitcast <3 x i8>
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; OPT-NEXT: load i32, i32 addrspace(4)
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; OPT-NEXT: trunc i32
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; OPT-NEXT: bitcast i24
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; OPT-NEXT: store <3 x i8>
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define amdgpu_kernel void @constant_load_v3i8(<3 x i8> addrspace(1)* %out, <3 x i8> addrspace(4)* %in) #0 {
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%ld = load <3 x i8>, <3 x i8> addrspace(4)* %in
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store <3 x i8> %ld, <3 x i8> addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_v3i8_align4
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; OPT: bitcast <3 x i8>
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; OPT-NEXT: load i32, i32 addrspace(4)
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; OPT-NEXT: trunc i32
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; OPT-NEXT: bitcast i24
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; OPT-NEXT: store <3 x i8>
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define amdgpu_kernel void @constant_load_v3i8_align4(<3 x i8> addrspace(1)* %out, <3 x i8> addrspace(4)* %in) #0 {
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%ld = load <3 x i8>, <3 x i8> addrspace(4)* %in, align 4
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store <3 x i8> %ld, <3 x i8> addrspace(1)* %out, align 4
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ret void
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}
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; OPT-LABEL: @constant_load_i16
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; OPT: load i16
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; OPT: sext
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_i16(i32 addrspace(1)* %out, i16 addrspace(4)* %in) #0 {
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%ld = load i16, i16 addrspace(4)* %in
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%ext = sext i16 %ld to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_i16_align4
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; OPT: bitcast
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; OPT-NEXT: load i32
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; OPT-NEXT: trunc
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; OPT-NEXT: sext
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_i16_align4(i32 addrspace(1)* %out, i16 addrspace(4)* %in) #0 {
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%ld = load i16, i16 addrspace(4)* %in, align 4
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%ext = sext i16 %ld to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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}
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; OPT-LABEL: @constant_load_f16
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; OPT: load half
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_f16(half addrspace(1)* %out, half addrspace(4)* %in) #0 {
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%ld = load half, half addrspace(4)* %in
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store half %ld, half addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_v2f16
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; OPT: load <2 x half>
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(4)* %in) #0 {
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%ld = load <2 x half>, <2 x half> addrspace(4)* %in
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store <2 x half> %ld, <2 x half> addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @load_volatile
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; OPT: load volatile i16
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; OPT-NEXT: store
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define amdgpu_kernel void @load_volatile(i16 addrspace(1)* %out, i16 addrspace(4)* %in) {
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%a = load volatile i16, i16 addrspace(4)* %in
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store i16 %a, i16 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_v2i8_volatile
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; OPT: load volatile <2 x i8>
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_v2i8_volatile(<2 x i8> addrspace(1)* %out, <2 x i8> addrspace(4)* %in) #0 {
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%ld = load volatile <2 x i8>, <2 x i8> addrspace(4)* %in
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store <2 x i8> %ld, <2 x i8> addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_v2i8_addrspace1
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; OPT: load <2 x i8>
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; OPT-NEXT: store
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define amdgpu_kernel void @constant_load_v2i8_addrspace1(<2 x i8> addrspace(1)* %out, <2 x i8> addrspace(1)* %in) #0 {
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%ld = load <2 x i8>, <2 x i8> addrspace(1)* %in
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store <2 x i8> %ld, <2 x i8> addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @use_dispatch_ptr
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; OPT: bitcast
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; OPT-NEXT: load i32
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; OPT-NEXT: trunc
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; OPT-NEXT: zext
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; OPT-NEXT: store
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define amdgpu_kernel void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #1 {
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%dispatch.ptr = call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
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%val = load i8, i8 addrspace(4)* %dispatch.ptr, align 4
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%ld = zext i8 %val to i32
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store i32 %ld, i32 addrspace(1)* %ptr
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ret void
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}
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; OPT-LABEL: @constant_load_i16_align4_range(
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; OPT: load i32, i32 addrspace(4)* %1, align 4, !range !0
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define amdgpu_kernel void @constant_load_i16_align4_range(i32 addrspace(1)* %out, i16 addrspace(4)* %in) #0 {
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%ld = load i16, i16 addrspace(4)* %in, align 4, !range !0
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%ext = sext i16 %ld to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_i16_align4_range_max(
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; OPT: load i32, i32 addrspace(4)* %1, align 4, !range !0
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define amdgpu_kernel void @constant_load_i16_align4_range_max(i32 addrspace(1)* %out, i16 addrspace(4)* %in) #0 {
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%ld = load i16, i16 addrspace(4)* %in, align 4, !range !1
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%ext = sext i16 %ld to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_i16_align4_complex_range(
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; OPT: load i32, i32 addrspace(4)* %1, align 4, !range !1
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define amdgpu_kernel void @constant_load_i16_align4_complex_range(i32 addrspace(1)* %out, i16 addrspace(4)* %in) #0 {
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%ld = load i16, i16 addrspace(4)* %in, align 4, !range !2
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%ext = sext i16 %ld to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_i16_align4_range_from_0(
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; OPT: load i32, i32 addrspace(4)* %1, align 4{{$}}
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define amdgpu_kernel void @constant_load_i16_align4_range_from_0(i32 addrspace(1)* %out, i16 addrspace(4)* %in) #0 {
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%ld = load i16, i16 addrspace(4)* %in, align 4, !range !3
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%ext = sext i16 %ld to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_i16_align4_range_from_neg(
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; OPT: load i32, i32 addrspace(4)* %1, align 4, !range !2
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define amdgpu_kernel void @constant_load_i16_align4_range_from_neg(i32 addrspace(1)* %out, i16 addrspace(4)* %in) #0 {
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%ld = load i16, i16 addrspace(4)* %in, align 4, !range !4
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%ext = sext i16 %ld to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_i16_align4_range_from_neg_to_0(
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; OPT: load i32, i32 addrspace(4)* %1, align 4, !range !2
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define amdgpu_kernel void @constant_load_i16_align4_range_from_neg_to_0(i32 addrspace(1)* %out, i16 addrspace(4)* %in) #0 {
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%ld = load i16, i16 addrspace(4)* %in, align 4, !range !5
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%ext = sext i16 %ld to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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; OPT-LABEL: @constant_load_i16_align4_invariant
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; OPT: load i32, i32 addrspace(4)* %1, align 4, !invariant.load !3
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define amdgpu_kernel void @constant_load_i16_align4_invariant(i32 addrspace(1)* %out, i16 addrspace(4)* %in) #0 {
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%ld = load i16, i16 addrspace(4)* %in, align 4, !invariant.load !6
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%ext = sext i16 %ld to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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; OPT: !0 = !{i32 5, i32 0}
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; OPT: !1 = !{i32 8, i32 0}
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; OPT: !2 = !{i32 65520, i32 0}
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; OPT: !3 = !{}
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!0 = !{i16 5, i16 500}
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!1 = !{i16 5, i16 -1}
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!2 = !{i16 8, i16 12, i16 42, i16 99}
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!3 = !{i16 0, i16 255}
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!4 = !{i16 -16, i16 16}
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!5 = !{i16 -16, i16 0}
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!6 = !{}
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