203 lines
6.1 KiB
Plaintext
203 lines
6.1 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=hawaii -mattr=+flat-for-global -run-pass=regbankselect %s -verify-machineinstrs -o - | FileCheck %s
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--- |
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define amdgpu_kernel void @load_constant(i32 addrspace(4)* %ptr0) {
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ret void
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}
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define amdgpu_kernel void @load_constant_volatile(i32 addrspace(4)* %ptr0) {
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ret void
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}
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define amdgpu_kernel void @load_global_uniform_invariant(i32 addrspace(1)* %ptr1) {
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%tmp0 = load i32, i32 addrspace(1)* %ptr1
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ret void
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}
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define amdgpu_kernel void @load_global_uniform_noclobber(i32 addrspace(1)* %ptr1) {
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%tmp0 = load i32, i32 addrspace(1)* %ptr1, !amdgpu.noclobber !0
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ret void
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}
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define amdgpu_kernel void @load_global_uniform_variant(i32 addrspace(1)* %ptr1) {
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%tmp0 = load i32, i32 addrspace(1)* %ptr1
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ret void
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}
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define amdgpu_kernel void @load_global_uniform_volatile_invariant(i32 addrspace(1)* %ptr1) {
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%tmp0 = load i32, i32 addrspace(1)* %ptr1
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ret void
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}
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define amdgpu_kernel void @load_global_uniform_atomic_invariant(i32 addrspace(1)* %ptr1) {
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%tmp0 = load i32, i32 addrspace(1)* %ptr1
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ret void
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}
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define amdgpu_kernel void @load_global_non_uniform(i32 addrspace(1)* %ptr2) {
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%tmp0 = call i32 @llvm.amdgcn.workitem.id.x() #0
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%tmp1 = getelementptr i32, i32 addrspace(1)* %ptr2, i32 %tmp0
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%tmp2 = load i32, i32 addrspace(1)* %tmp1
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ret void
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}
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define void @non_power_of_2() { ret void }
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define amdgpu_kernel void @load_constant_v4i16_from_8_align8(<3 x i16> addrspace(4)* %ptr0) {
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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attributes #0 = { nounwind readnone }
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!0 = !{}
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...
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---
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name: load_constant
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: load_constant
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; CHECK: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
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; CHECK: [[LOAD:%[0-9]+]]:sgpr(s32) = G_LOAD [[COPY]](p4) :: (load 4 from %ir.ptr0, addrspace 4)
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%0:_(p4) = COPY $sgpr0_sgpr1
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%1:_(s32) = G_LOAD %0 :: (load 4 from %ir.ptr0)
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...
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---
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name: load_constant_volatile
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: load_constant_volatile
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; CHECK: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
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; CHECK: [[LOAD:%[0-9]+]]:sgpr(s32) = G_LOAD [[COPY]](p4) :: (volatile load 4 from %ir.ptr0, addrspace 4)
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%0:_(p4) = COPY $sgpr0_sgpr1
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%1:_(s32) = G_LOAD %0 :: (volatile load 4 from %ir.ptr0)
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...
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---
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name: load_global_uniform_invariant
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: load_global_uniform_invariant
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; CHECK: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
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; CHECK: [[LOAD:%[0-9]+]]:sgpr(s32) = G_LOAD [[COPY]](p1) :: (invariant load 4 from %ir.ptr1, addrspace 1)
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%0:_(p1) = COPY $sgpr0_sgpr1
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%1:_(s32) = G_LOAD %0 :: (invariant load 4 from %ir.ptr1)
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...
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---
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name: load_global_uniform_noclobber
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: load_global_uniform_noclobber
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; CHECK: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
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; CHECK: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (load 4 from %ir.ptr1, addrspace 1)
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%0:_(p1) = COPY $sgpr0_sgpr1
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%1:_(s32) = G_LOAD %0 :: (load 4 from %ir.ptr1)
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...
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---
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name: load_global_uniform_variant
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: load_global_uniform_variant
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; CHECK: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
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; CHECK: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (load 4 from %ir.ptr1, addrspace 1)
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%0:_(p1) = COPY $sgpr0_sgpr1
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%1:_(s32) = G_LOAD %0 :: (load 4 from %ir.ptr1)
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...
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---
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name: load_global_uniform_volatile_invariant
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: load_global_uniform_volatile_invariant
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; CHECK: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
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; CHECK: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (volatile invariant load 4 from %ir.ptr1, addrspace 1)
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%0:_(p1) = COPY $sgpr0_sgpr1
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%1:_(s32) = G_LOAD %0 :: (volatile invariant load 4 from %ir.ptr1)
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...
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---
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name: load_global_uniform_atomic_invariant
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: load_global_uniform_atomic_invariant
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; CHECK: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
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; CHECK: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (invariant load acquire 4 from %ir.ptr1, addrspace 1)
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%0:_(p1) = COPY $sgpr0_sgpr1
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%1:_(s32) = G_LOAD %0 :: (invariant load acquire 4 from %ir.ptr1)
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...
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---
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name: load_global_non_uniform
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: load_global_non_uniform
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; CHECK: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[COPY]](p1)
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; CHECK: [[LOAD:%[0-9]+]]:vgpr(s32) = G_LOAD [[COPY1]](p1) :: (load 4 from %ir.tmp1, addrspace 1)
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%0:_(p1) = COPY $sgpr0_sgpr1
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%1:_(s32) = G_LOAD %0 :: (load 4 from %ir.tmp1)
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...
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---
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name: non_power_of_2
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legalized: true
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body: |
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bb.0:
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; CHECK-LABEL: name: non_power_of_2
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; CHECK: [[DEF:%[0-9]+]]:sgpr(s448) = G_IMPLICIT_DEF
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; CHECK: [[EXTRACT:%[0-9]+]]:sgpr(s32) = G_EXTRACT [[DEF]](s448), 0
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; CHECK: $sgpr0 = COPY [[EXTRACT]](s32)
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; CHECK: SI_RETURN_TO_EPILOG $sgpr0
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%0:_(s448) = G_IMPLICIT_DEF
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%1:_(s32) = G_EXTRACT %0:_(s448), 0
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$sgpr0 = COPY %1:_(s32)
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SI_RETURN_TO_EPILOG $sgpr0
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...
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---
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name: load_constant_v4i16_from_8_align8
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legalized: true
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body: |
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bb.0:
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; CHECK-LABEL: name: load_constant_v4i16_from_8_align8
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; CHECK: [[COPY:%[0-9]+]]:sgpr(p4) = COPY $sgpr0_sgpr1
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; CHECK: [[LOAD:%[0-9]+]]:sgpr(<4 x s16>) = G_LOAD [[COPY]](p4) :: (load 8 from %ir.ptr0, addrspace 4)
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%0:_(p4) = COPY $sgpr0_sgpr1
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%1:_(<4 x s16>) = G_LOAD %0 :: (load 8 from %ir.ptr0, align 8, addrspace 4)
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...
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