69 lines
2.5 KiB
Plaintext
69 lines
2.5 KiB
Plaintext
|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||
|
|
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
|
||
|
|
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
|
||
|
|
|
||
|
|
---
|
||
|
|
name: fmul_legacy_ss
|
||
|
|
legalized: true
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $sgpr0, $sgpr1
|
||
|
|
; CHECK-LABEL: name: fmul_legacy_ss
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||
|
|
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
|
||
|
|
; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
|
||
|
|
; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), [[COPY2]](s32), [[COPY3]](s32)
|
||
|
|
%0:_(s32) = COPY $sgpr0
|
||
|
|
%1:_(s32) = COPY $sgpr1
|
||
|
|
%2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), %0, %1
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: fmul_legacy_sv
|
||
|
|
legalized: true
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $sgpr0, $vgpr0
|
||
|
|
; CHECK-LABEL: name: fmul_legacy_sv
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||
|
|
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
|
||
|
|
; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), [[COPY2]](s32), [[COPY1]](s32)
|
||
|
|
%0:_(s32) = COPY $sgpr0
|
||
|
|
%1:_(s32) = COPY $vgpr0
|
||
|
|
%2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), %0, %1
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: fmul_legacy_vs
|
||
|
|
legalized: true
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $sgpr0, $vgpr0
|
||
|
|
; CHECK-LABEL: name: fmul_legacy_vs
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||
|
|
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
|
||
|
|
; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), [[COPY1]](s32), [[COPY2]](s32)
|
||
|
|
%0:_(s32) = COPY $sgpr0
|
||
|
|
%1:_(s32) = COPY $vgpr0
|
||
|
|
%2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), %1, %0
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: fmul_legacy_vv
|
||
|
|
legalized: true
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0, $vgpr1
|
||
|
|
; CHECK-LABEL: name: fmul_legacy_vv
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||
|
|
; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), [[COPY]](s32), [[COPY1]](s32)
|
||
|
|
%0:_(s32) = COPY $vgpr0
|
||
|
|
%1:_(s32) = COPY $vgpr1
|
||
|
|
%2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.fmul.legacy), %0, %1
|
||
|
|
...
|