llvm-for-llvmta/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-selec...

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
---
name: select_from_different_results_of_unmerge_values
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: select_from_different_results_of_unmerge_values
; GCN: liveins: $vgpr0
; GCN: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
; GCN: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GCN: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
; GCN: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<2 x s32>)
; GCN: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[UV]], [[UV1]]
; GCN: $vgpr0 = COPY [[SELECT]](s32)
; GCN: SI_RETURN_TO_EPILOG $vgpr0
%0:_(<2 x s32>) = G_IMPLICIT_DEF
%1:_(s32) = COPY $vgpr0
%2:_(s1) = G_TRUNC %1:_(s32)
%3:_(s32), %4:_(s32) = G_UNMERGE_VALUES %0:_(<2 x s32>)
%5:_(s32) = G_SELECT %2:_(s1), %3:_, %4:_
$vgpr0 = COPY %5
SI_RETURN_TO_EPILOG $vgpr0
...
---
name: select_from_same_results_of_unmerge_values
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: select_from_same_results_of_unmerge_values
; GCN: liveins: $vgpr0
; GCN: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF
; GCN: [[BITCAST:%[0-9]+]]:_(s64) = G_BITCAST [[DEF]](<2 x s32>)
; GCN: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[BITCAST]](s64)
; GCN: $vgpr0 = COPY [[TRUNC]](s32)
; GCN: SI_RETURN_TO_EPILOG $vgpr0
%0:_(<2 x s32>) = G_IMPLICIT_DEF
%1:_(s32) = COPY $vgpr0
%2:_(s1) = G_TRUNC %1:_(s32)
%3:_(s32), %4:_(s32) = G_UNMERGE_VALUES %0:_(<2 x s32>)
%5:_(s32) = G_SELECT %2:_(s1), %3:_, %3:_
$vgpr0 = COPY %5
SI_RETURN_TO_EPILOG $vgpr0
...