37 lines
1.5 KiB
Plaintext
37 lines
1.5 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer -o - %s | FileCheck %s
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# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
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# ERROR: LLVM ERROR: unable to legalize instruction: %2:_(s32) = G_ATOMICRMW_XCHG %0:_(p0), %1:_ :: (load store seq_cst 4) (in function: atomicrmw_xchg_flat_i32)
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---
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name: atomicrmw_xchg_flat_i32
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $sgpr2
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; CHECK-LABEL: name: atomicrmw_xchg_flat_i32
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $sgpr0_sgpr1
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr2
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; CHECK: [[ATOMICRMW_XCHG:%[0-9]+]]:_(s32) = G_ATOMICRMW_XCHG [[COPY]](p0), [[COPY1]] :: (load store seq_cst 4)
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%0:_(p0) = COPY $sgpr0_sgpr1
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%1:_(s32) = COPY $sgpr2
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%2:_(s32) = G_ATOMICRMW_XCHG %0, %1 :: (load store seq_cst 4, addrspace 0)
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...
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---
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name: atomicrmw_xchg_flat_i64
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $sgpr2
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; CHECK-LABEL: name: atomicrmw_xchg_flat_i64
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $sgpr0_sgpr1
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr2
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; CHECK: [[ATOMICRMW_XCHG:%[0-9]+]]:_(s32) = G_ATOMICRMW_XCHG [[COPY]](p0), [[COPY1]] :: (load store seq_cst 4)
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%0:_(p0) = COPY $sgpr0_sgpr1
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%1:_(s32) = COPY $sgpr2
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%2:_(s32) = G_ATOMICRMW_XCHG %0, %1 :: (load store seq_cst 4, addrspace 0)
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...
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