llvm-for-llvmta/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s16.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX8 %s
---
name: fadd_s16_vvv
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX8-LABEL: name: fadd_s16_vvv
; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX8: %4:vgpr_32 = nofpexcept V_ADD_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX8: S_ENDPGM 0, implicit %4
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s32) = COPY $vgpr1
%2:vgpr(s16) = G_TRUNC %0
%3:vgpr(s16) = G_TRUNC %1
%4:vgpr(s16) = G_FADD %2, %3
S_ENDPGM 0, implicit %4
...
---
name: fadd_s16_vsv
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0, $sgpr0
; GFX8-LABEL: name: fadd_s16_vsv
; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX8: %4:vgpr_32 = nofpexcept V_ADD_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX8: S_ENDPGM 0, implicit %4
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:sgpr(s16) = G_TRUNC %0
%3:vgpr(s16) = G_TRUNC %1
%4:vgpr(s16) = G_FADD %2, %3
S_ENDPGM 0, implicit %4
...
---
name: fadd_s16_vvs
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0, $sgpr0
; GFX8-LABEL: name: fadd_s16_vvs
; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX8: %4:vgpr_32 = nofpexcept V_ADD_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX8: S_ENDPGM 0, implicit %4
%0:vgpr(s32) = COPY $vgpr0
%1:sgpr(s32) = COPY $sgpr0
%2:vgpr(s16) = G_TRUNC %0
%3:sgpr(s16) = G_TRUNC %1
%4:vgpr(s16) = G_FADD %2, %3
S_ENDPGM 0, implicit %4
...
---
name: fadd_s16_vvv_fabs_lhs
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX8-LABEL: name: fadd_s16_vvv_fabs_lhs
; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX8: %5:vgpr_32 = nofpexcept V_ADD_F16_e64 2, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX8: S_ENDPGM 0, implicit %5
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s32) = COPY $vgpr1
%2:vgpr(s16) = G_TRUNC %0
%3:vgpr(s16) = G_TRUNC %1
%4:vgpr(s16) = G_FABS %2
%5:vgpr(s16) = G_FADD %4, %3
S_ENDPGM 0, implicit %5
...
---
name: fadd_s16_vvv_fabs_rhs
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX8-LABEL: name: fadd_s16_vvv_fabs_rhs
; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX8: %5:vgpr_32 = nofpexcept V_ADD_F16_e64 0, [[COPY]], 2, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX8: S_ENDPGM 0, implicit %5
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s32) = COPY $vgpr1
%2:vgpr(s16) = G_TRUNC %0
%3:vgpr(s16) = G_TRUNC %1
%4:vgpr(s16) = G_FABS %3
%5:vgpr(s16) = G_FADD %2, %4
S_ENDPGM 0, implicit %5
...
---
name: fadd_s16_vvv_fneg_fabs_lhs
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX8-LABEL: name: fadd_s16_vvv_fneg_fabs_lhs
; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX8: %6:vgpr_32 = nofpexcept V_ADD_F16_e64 3, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX8: S_ENDPGM 0, implicit %6
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s32) = COPY $vgpr1
%2:vgpr(s16) = G_TRUNC %0
%3:vgpr(s16) = G_TRUNC %1
%4:vgpr(s16) = G_FABS %2
%5:vgpr(s16) = G_FNEG %4
%6:vgpr(s16) = G_FADD %5, %3
S_ENDPGM 0, implicit %6
...
---
name: fadd_s16_vvv_fneg_fabs_rhs
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX8-LABEL: name: fadd_s16_vvv_fneg_fabs_rhs
; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX8: %6:vgpr_32 = nofpexcept V_ADD_F16_e64 0, [[COPY]], 3, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX8: S_ENDPGM 0, implicit %6
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s32) = COPY $vgpr1
%2:vgpr(s16) = G_TRUNC %0
%3:vgpr(s16) = G_TRUNC %1
%4:vgpr(s16) = G_FABS %3
%5:vgpr(s16) = G_FNEG %4
%6:vgpr(s16) = G_FADD %2, %5
S_ENDPGM 0, implicit %6
...
---
name: fadd_s16_fneg_copy_sgpr
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0, $sgpr0
; GFX8-LABEL: name: fadd_s16_fneg_copy_sgpr
; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX8: %5:vgpr_32 = nofpexcept V_ADD_F16_e64 0, [[COPY]], 1, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX8: S_ENDPGM 0, implicit %5
%0:vgpr(s32) = COPY $vgpr0
%1:sgpr(s32) = COPY $sgpr0
%2:vgpr(s16) = G_TRUNC %0
%3:sgpr(s16) = G_TRUNC %1
%4:sgpr(s16) = G_FNEG %3
%5:vgpr(s16) = G_FADD %2, %4
S_ENDPGM 0, implicit %5
...