157 lines
4.8 KiB
Plaintext
157 lines
4.8 KiB
Plaintext
|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||
|
# RUN: llc -march=amdgcn -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
|
||
|
|
||
|
---
|
||
|
name: test_const_const_1
|
||
|
tracksRegLiveness: true
|
||
|
body: |
|
||
|
bb.0:
|
||
|
; CHECK-LABEL: name: test_const_const_1
|
||
|
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
|
||
|
; CHECK: $sgpr0 = COPY [[C]](s32)
|
||
|
; CHECK: SI_RETURN_TO_EPILOG implicit $sgpr0
|
||
|
%0:_(s32) = G_CONSTANT i32 255
|
||
|
%1:_(s32) = G_CONSTANT i32 15
|
||
|
%2:_(s32) = G_OR %0(s32), %1(s32)
|
||
|
$sgpr0 = COPY %2(s32)
|
||
|
SI_RETURN_TO_EPILOG implicit $sgpr0
|
||
|
...
|
||
|
|
||
|
---
|
||
|
name: test_const_const_2
|
||
|
tracksRegLiveness: true
|
||
|
body: |
|
||
|
bb.0:
|
||
|
; CHECK-LABEL: name: test_const_const_2
|
||
|
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
|
||
|
; CHECK: $vgpr0 = COPY [[C]](s32)
|
||
|
; CHECK: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||
|
%0:_(s32) = G_CONSTANT i32 15
|
||
|
%1:_(s32) = G_CONSTANT i32 255
|
||
|
%2:_(s32) = G_OR %0(s32), %1(s32)
|
||
|
$vgpr0 = COPY %2(s32)
|
||
|
SI_RETURN_TO_EPILOG implicit $vgpr0
|
||
|
...
|
||
|
|
||
|
---
|
||
|
name: test_const_const_3
|
||
|
tracksRegLiveness: true
|
||
|
body: |
|
||
|
bb.0:
|
||
|
; CHECK-LABEL: name: test_const_const_3
|
||
|
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1431655765
|
||
|
; CHECK: $vgpr0 = COPY [[C]](s32)
|
||
|
; CHECK: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||
|
%0:_(s32) = G_CONSTANT i32 1431655765
|
||
|
%1:_(s32) = G_CONSTANT i32 1145324612
|
||
|
%2:_(s32) = G_OR %1(s32), %0(s32)
|
||
|
$vgpr0 = COPY %2(s32)
|
||
|
SI_RETURN_TO_EPILOG implicit $vgpr0
|
||
|
...
|
||
|
|
||
|
---
|
||
|
name: test_or_or
|
||
|
tracksRegLiveness: true
|
||
|
body: |
|
||
|
bb.0:
|
||
|
liveins: $vgpr0
|
||
|
|
||
|
; CHECK-LABEL: name: test_or_or
|
||
|
; CHECK: liveins: $vgpr0
|
||
|
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||
|
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
|
||
|
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[C]]
|
||
|
; CHECK: $vgpr0 = COPY [[OR]](s32)
|
||
|
; CHECK: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||
|
%0:_(s32) = COPY $vgpr0
|
||
|
%1:_(s32) = G_CONSTANT i32 255
|
||
|
%2:_(s32) = G_CONSTANT i32 15
|
||
|
%3:_(s32) = G_OR %0, %1(s32)
|
||
|
%4:_(s32) = G_OR %3, %2
|
||
|
$vgpr0 = COPY %4(s32)
|
||
|
SI_RETURN_TO_EPILOG implicit $vgpr0
|
||
|
...
|
||
|
|
||
|
---
|
||
|
name: test_shl_xor_or
|
||
|
tracksRegLiveness: true
|
||
|
body: |
|
||
|
bb.0:
|
||
|
liveins: $sgpr0
|
||
|
|
||
|
; CHECK-LABEL: name: test_shl_xor_or
|
||
|
; CHECK: liveins: $sgpr0
|
||
|
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
|
||
|
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
|
||
|
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
|
||
|
; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
|
||
|
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[SHL]], [[C1]]
|
||
|
; CHECK: $sgpr0 = COPY [[XOR]](s32)
|
||
|
; CHECK: SI_RETURN_TO_EPILOG implicit $sgpr0
|
||
|
%0:_(s32) = COPY $sgpr0
|
||
|
%1:_(s32) = G_CONSTANT i32 5
|
||
|
%2:_(s32) = G_CONSTANT i32 -1
|
||
|
%3:_(s32) = G_CONSTANT i32 31
|
||
|
%4:_(s32) = G_SHL %0, %1(s32)
|
||
|
%5:_(s32) = G_XOR %4(s32), %2(s32)
|
||
|
%6:_(s32) = G_OR %5(s32), %3(s32)
|
||
|
$sgpr0 = COPY %6(s32)
|
||
|
SI_RETURN_TO_EPILOG implicit $sgpr0
|
||
|
...
|
||
|
|
||
|
---
|
||
|
name: test_lshr_xor_or
|
||
|
tracksRegLiveness: true
|
||
|
body: |
|
||
|
bb.0:
|
||
|
liveins: $vgpr0
|
||
|
|
||
|
; CHECK-LABEL: name: test_lshr_xor_or
|
||
|
; CHECK: liveins: $vgpr0
|
||
|
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||
|
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
|
||
|
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
|
||
|
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
|
||
|
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[LSHR]], [[C1]]
|
||
|
; CHECK: $vgpr0 = COPY [[XOR]](s32)
|
||
|
; CHECK: SI_RETURN_TO_EPILOG implicit $vgpr0
|
||
|
%0:_(s32) = COPY $vgpr0
|
||
|
%1:_(s32) = G_CONSTANT i32 5
|
||
|
%2:_(s32) = G_CONSTANT i32 -1
|
||
|
%3:_(s32) = G_CONSTANT i32 4160749568
|
||
|
%4:_(s32) = G_LSHR %0, %1(s32)
|
||
|
%5:_(s32) = G_XOR %4(s32), %2(s32)
|
||
|
%6:_(s32) = G_OR %5(s32), %3(s32)
|
||
|
$vgpr0 = COPY %6(s32)
|
||
|
SI_RETURN_TO_EPILOG implicit $vgpr0
|
||
|
...
|
||
|
|
||
|
---
|
||
|
name: test_or_non_const
|
||
|
tracksRegLiveness: true
|
||
|
body: |
|
||
|
bb.0:
|
||
|
liveins: $sgpr0, $sgpr1
|
||
|
|
||
|
; CHECK-LABEL: name: test_or_non_const
|
||
|
; CHECK: liveins: $sgpr0, $sgpr1
|
||
|
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
|
||
|
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
||
|
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
|
||
|
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
|
||
|
; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[LSHR]], [[C1]]
|
||
|
; CHECK: $sgpr0 = COPY [[XOR]](s32)
|
||
|
; CHECK: SI_RETURN_TO_EPILOG implicit $sgpr0
|
||
|
%0:_(s32) = COPY $sgpr0
|
||
|
%1:_(s32) = COPY $sgpr1
|
||
|
%2:_(s32) = G_CONSTANT i32 16
|
||
|
%3:_(s32) = G_CONSTANT i32 -1
|
||
|
%4:_(s32) = G_CONSTANT i32 4294901760
|
||
|
%5:_(s32) = G_LSHR %0, %2(s32)
|
||
|
%6:_(s32) = G_XOR %5, %3(s32)
|
||
|
%7:_(s32) = G_AND %1, %4(s32)
|
||
|
%8:_(s32) = G_OR %6, %7
|
||
|
$sgpr0 = COPY %8(s32)
|
||
|
SI_RETURN_TO_EPILOG implicit $sgpr0
|
||
|
...
|