85 lines
4.2 KiB
LLVM
85 lines
4.2 KiB
LLVM
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
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; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
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; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
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; WARN-NOT: warning
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;
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; LD1H, LD1W, LD1D: base + 64-bit scaled offset
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; e.g. ld1h z0.d, p0/z, [x0, z0.d, lsl #1]
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;
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define <vscale x 2 x i64> @gld1h_index(<vscale x 2 x i1> %pg, i16* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1h_index
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; CHECK: ld1h { z0.d }, p0/z, [x0, z0.d, lsl #1]
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %pg,
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i16* %base,
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<vscale x 2 x i64> %b)
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%res = zext <vscale x 2 x i16> %load to <vscale x 2 x i64>
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ret <vscale x 2 x i64> %res
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}
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define <vscale x 2 x i64> @gld1w_index(<vscale x 2 x i1> %pg, i32* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1w_index
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; CHECK: ld1w { z0.d }, p0/z, [x0, z0.d, lsl #2]
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %pg,
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i32* %base,
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<vscale x 2 x i64> %b)
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%res = zext <vscale x 2 x i32> %load to <vscale x 2 x i64>
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ret <vscale x 2 x i64> %res
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}
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define <vscale x 2 x i64> @gld1d_index(<vscale x 2 x i1> %pg, i64* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1d_index
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; CHECK: ld1d { z0.d }, p0/z, [x0, z0.d, lsl #3]
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.index.nxv2i64(<vscale x 2 x i1> %pg,
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i64* %base,
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<vscale x 2 x i64> %b)
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ret <vscale x 2 x i64> %load
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}
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define <vscale x 2 x double> @gld1d_index_double(<vscale x 2 x i1> %pg, double* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1d_index_double
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; CHECK: ld1d { z0.d }, p0/z, [x0, z0.d, lsl #3]
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.index.nxv2f64(<vscale x 2 x i1> %pg,
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double* %base,
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<vscale x 2 x i64> %b)
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ret <vscale x 2 x double> %load
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}
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;
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; LD1SH, LD1SW: base + 64-bit scaled offset
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; e.g. ld1sh z0.d, p0/z, [x0, z0.d, lsl #1]
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;
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define <vscale x 2 x i64> @gld1sh_index(<vscale x 2 x i1> %pg, i16* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1sh_index
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; CHECK: ld1sh { z0.d }, p0/z, [x0, z0.d, lsl #1]
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %pg,
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i16* %base,
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<vscale x 2 x i64> %b)
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%res = sext <vscale x 2 x i16> %load to <vscale x 2 x i64>
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ret <vscale x 2 x i64> %res
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}
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define <vscale x 2 x i64> @gld1sw_index(<vscale x 2 x i1> %pg, i32* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: gld1sw_index
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; CHECK: ld1sw { z0.d }, p0/z, [x0, z0.d, lsl #2]
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; CHECK-NEXT: ret
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%load = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %pg,
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i32* %base,
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<vscale x 2 x i64> %b)
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%res = sext <vscale x 2 x i32> %load to <vscale x 2 x i64>
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ret <vscale x 2 x i64> %res
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}
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declare <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1>, i16*, <vscale x 2 x i64>)
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declare <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1>, i32*, <vscale x 2 x i64>)
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declare <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.index.nxv2i64(<vscale x 2 x i1>, i64*, <vscale x 2 x i64>)
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declare <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.index.nxv2f64(<vscale x 2 x i1>, double*, <vscale x 2 x i64>)
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