149 lines
3.7 KiB
Plaintext
149 lines
3.7 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @xor_s32_gpr() { ret void }
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define void @xor_s64_gpr() { ret void }
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define void @xor_constant_n1_s32_gpr() { ret void }
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define void @xor_constant_n1_s64_gpr() { ret void }
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define void @xor_constant_n1_s32_gpr_2bb() { ret void }
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...
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---
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# Check that we select a 32-bit GPR G_XOR into EORWrr on GPR32.
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# Also check that we constrain the register class of the COPY to GPR32.
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name: xor_s32_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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body: |
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bb.0:
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liveins: $w0, $w1
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; CHECK-LABEL: name: xor_s32_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK: [[EORWrr:%[0-9]+]]:gpr32 = EORWrr [[COPY]], [[COPY1]]
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; CHECK: $w0 = COPY [[EORWrr]]
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%0(s32) = COPY $w0
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%1(s32) = COPY $w1
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%2(s32) = G_XOR %0, %1
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$w0 = COPY %2(s32)
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...
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---
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# Same as xor_s64_gpr, for 64-bit operations.
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name: xor_s64_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $x1
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; CHECK-LABEL: name: xor_s64_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: [[EORXrr:%[0-9]+]]:gpr64 = EORXrr [[COPY]], [[COPY1]]
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; CHECK: $x0 = COPY [[EORXrr]]
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%0(s64) = COPY $x0
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%1(s64) = COPY $x1
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%2(s64) = G_XOR %0, %1
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$x0 = COPY %2(s64)
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...
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---
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# Check that we select a 32-bit GPR G_XOR into EORWrr on GPR32.
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# Also check that we constrain the register class of the COPY to GPR32.
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name: xor_constant_n1_s32_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: xor_constant_n1_s32_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[ORNWrr:%[0-9]+]]:gpr32 = ORNWrr $wzr, [[COPY]]
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; CHECK: $w0 = COPY [[ORNWrr]]
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%0(s32) = COPY $w0
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%1(s32) = G_CONSTANT i32 -1
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%2(s32) = G_XOR %0, %1
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$w0 = COPY %2(s32)
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...
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---
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# Same as xor_constant_n1_s64_gpr, for 64-bit operations.
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name: xor_constant_n1_s64_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: xor_constant_n1_s64_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[ORNXrr:%[0-9]+]]:gpr64 = ORNXrr $xzr, [[COPY]]
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; CHECK: $x0 = COPY [[ORNXrr]]
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%0(s64) = COPY $x0
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%1(s64) = G_CONSTANT i64 -1
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%2(s64) = G_XOR %0, %1
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$x0 = COPY %2(s64)
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...
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---
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# Check that we can obtain constants from other basic blocks.
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name: xor_constant_n1_s32_gpr_2bb
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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body: |
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; CHECK-LABEL: name: xor_constant_n1_s32_gpr_2bb
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: bb.1:
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[ORNWrr:%[0-9]+]]:gpr32 = ORNWrr $wzr, [[COPY]]
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; CHECK: $w0 = COPY [[ORNWrr]]
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bb.0:
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liveins: $w0, $w1
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successors: %bb.1
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%1(s32) = G_CONSTANT i32 -1
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G_BR %bb.1
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bb.1:
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%0(s32) = COPY $w0
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%2(s32) = G_XOR %0, %1
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$w0 = COPY %2(s32)
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...
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