44 lines
1.1 KiB
Plaintext
44 lines
1.1 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @SMADDLrrr_gpr() { ret void }
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...
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---
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name: SMADDLrrr_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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- { id: 4, class: gpr }
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- { id: 5, class: gpr }
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- { id: 6, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $w1, $w2
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; CHECK-LABEL: name: SMADDLrrr_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
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; CHECK: [[SMADDLrrr:%[0-9]+]]:gpr64 = SMADDLrrr [[COPY1]], [[COPY2]], [[COPY]]
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; CHECK: $x0 = COPY [[SMADDLrrr]]
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%0(s64) = COPY $x0
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%1(s32) = COPY $w1
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%2(s32) = COPY $w2
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%3(s64) = G_SEXT %1
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%4(s64) = G_SEXT %2
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%5(s64) = G_MUL %3, %4
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%6(s64) = G_ADD %0, %5
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$x0 = COPY %6
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...
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