35 lines
1.1 KiB
Plaintext
35 lines
1.1 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: mul_i64_sext_imm32
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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body: |
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bb.0:
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liveins: $w0
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; Make sure InstructionSelector is able to match a pattern
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; with an SDNodeXForm, trunc_imm.
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; def : Pat<(i64 (mul (sext GPR32:$Rn), (s64imm_32bit:$C))),
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; (SMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), XZR)>;
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; CHECK-LABEL: name: mul_i64_sext_imm32
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 3
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; CHECK: [[SMADDLrrr:%[0-9]+]]:gpr64 = SMADDLrrr [[COPY]], [[MOVi32imm]], $xzr
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; CHECK: $x0 = COPY [[SMADDLrrr]]
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%0:gpr(s32) = COPY $w0
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%1:gpr(s64) = G_SEXT %0(s32)
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%2:gpr(s64) = G_CONSTANT i64 3
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%3:gpr(s64) = G_MUL %1, %2
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$x0 = COPY %3(s64)
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...
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